• 한국진공학회지
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• 제8권1호
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• pp.31-35
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• 1999

본 연구에서는 반도체 소자에서 일렉트로마이그레이션에 기인하는 Al-1%Si 박막배선의 길이 변화에 따른 수명시간 의존도를 조사하였다. 사용된 Al-1%Si 박막배선은 표준 사진식각 공정(standard photolithography process)을 사용하여 제작된 직선형 패턴이다. 직선형 패턴은 100에서 1600 $mu extrm{m}$ 범위의 길이 변화를 갖도록 제작하였다. Ti underlayer가 없는 시편보다 Ti underlayer가 있는 시편에서 Al-1%Si 박막배선의 수명시간이 더 길게 나타났다. Ti underlayer를 갖는 시편에서 electromigration에 대한 저항성을 향상시키는 것으로 사료되어진다. Al-1%Si 박막배선의 길이에 의존하는 수명시간은 800$\mu\textrm{m}$ 이하에서 포화되는 경향을 나타내었다.

• 한국세라믹학회지
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• 제39권8호
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• pp.807-811
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• 2002

본 연구에서는 EUVL(Extreme Ultra-Violet Lithography) 공정에서 사용되어지는 Mo/Si 다층박막 마스크 물질의 최적화된 제조공정을 도모하기 위해 Monte Carlo법을 적용한 PVD 공정 시뮬레이터를 사용하여 Mo/Si 다층박막 증착변수에 따른 박막의 형상변화를 분석하였다. 박막의 형상은 가스압력(1∼30 mTorr), 타겟과 기판과의 거리 (1∼30 cm) 및 확산거리(1∼10 nm)에 따라 크게 변함을 알 수 있었으며 가스압력이 낮을수록, 기판과 타겟과의 거리가 멀어질수록 균일한 표면의 박막 형성이 가능할 것으로 예측되었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 추계학술대회 논문집 Vol.18
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• pp.248-249
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• 2005

The tungsten bronze type of strontium barium niobate(SBN) thin film was synthesized by metal organic decomposion method for SBN stock solution and the SBN thin film process were deposited by spin-coating process on Pt-deposited si-wafer(100) by magnetron sputtering system. The thickness of SBN thin film was 150$\sim$200 nm and were optimized for rpm of spin-coater system. The structural variation of SBN thin film was studied by TG-DTA and XRD. The deposited SBN stock solution on annealing at $400\sim800^{\circ}C$ a pure tungsten bronze SBN phase and the corresponding average grain size about 500$\sim$1000 nm influenced by annealing temperature.

• 한국전기전자재료학회논문지
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• 제36권5호
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• pp.463-473
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• 2023

In recent years, the transparent amorphous oxide thin film transistor represented by indium-gallium-zinc-oxide (IGZO) has become the first choice of the next generation of integrated circuit control components. This article contributes an overview of IGZO thin-film transistors (TFTs), including their fundamental principles and recent advancements. The paper outlines various TFT structures and places emphasis on the fabrication process of the active layer. The result showed that the size of the active layer including the length-to-width ratio and the width could have a significant effect on the mobility. And the process of TFT could influence the crystal structure of IGZO thin film. Furthermore, the article presents an overview of recent applications of IGZO TFTs, such as their use in display drivers and TFT memories. At last, the future development of IGZO TFT is forecasted in this paper.

• Journal of Electrical Engineering and Technology
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• 제12권6호
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• pp.2353-2358
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• 2017

A femtosecond laser pre-annealing process based on indium zinc oxide (IZO) thin-film transistors (TFTs) is fabricated. We demonstrate a stable pre-annealing process to analyze surface structure change of thin films, and we maintain electrical stability and improve electrical performance. Furthermore, dynamic electrical characteristics of the IZO TFTs were investigated. Femtosecond laser pre-annealing process-based IZO TFTs exhibit a field-effect mobility of $3.75cm^2/Vs$, an $I_{on}/I_{off}$ ratio of $1.77{\times}10^5$, a threshold voltage of 1.13 V, and a subthreshold swing of 1.21 V/dec. And the IZO-based inverter shows a fast switching behavior response. From this study, IZO TFTs from using the femtosecond laser annealing technique were found to strongly affect the electrical performance and charge transport dynamics in electronic devices.

• 마이크로전자및패키징학회지
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• 제25권2호
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• pp.49-53
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• 2018

최근 유연 소자, 투명 소자, MEMS 소자와 같은 다양한 소자를 결합하는 시스템 집적화 기술이 많이 개발되고 있다. 이러한 다종 소자 시스템 제조 기술의 핵심 공정은 칩 또는 웨이퍼 레벨의 접합 공정, 기판 연삭 공정, 그리고 박막 기판 핸들링 기술이라 하겠다. 본 연구에서는 Si 기판 연삭 공정이 투명 박막 트랜지스터나 유연 전극 소재로 적용되는 산화주석 박막의 전기적 성질에 미치는 영향을 분석하였다. Si 기판의 두께가 얇아질수록 Si d-spacing은 감소하였고, Si 격자 내에 strain이 발생하였다. 또한, Si 기판의 두께가 얇아질수록 산화주석 박막 내 캐리어 농도가 감소하여 전기전도도가 감소하였다. 얇은 산화 주석 박막의 경우 전기전도도는 두꺼운 산화 주석 박막보다 낮았으며 Si 기판의 두께에 의해 크게 변하지 않았다.

• 한국전기전자재료학회논문지
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• 제24권9호
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• pp.766-772
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• 2011

Amorphous Si (a-Si) thin films of $p^+/p^-/n^+$ were deposited on $Si_3N_4$/glass substrate by using a plasma enhanced chemical vapor deposition (PECVD) method. These films were annealed at various temperatures and for various times by using a rapid thermal process (RTP) equipment. This step was added before the main thermal treatment to make the nuclei in the a-Si thin film for reducing the process time of the crystallization. The main heat treatment for the crystallization was performed at the same condition of $600^{\circ}C$/18 h in conventional furnace. The open-circuit voltages ($V_{oc}$) were remained about 450 mV up to the nucleation condition of 16min in the nucleation RTP temperature of $680^{\circ}C$. It meat that the process time for the crystallization step could be reduced by adding the nucleation step without decreasing the electrical property of the thin film Si for the solar cell application.

• 한국세라믹학회지
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• 제43권1호
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• pp.42-47
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• 2006

In this paper, we prepared high-quality ZnO thin films for application of FBAR (Film Bulk Acoustic Resonator) by using pulse DC magnetron sputtering. To prevent the formation of low dielectric layers between metal and piezoelectric layer, Ru film of 30 nm thickness was used as a buffer layer. In addition we investigated the influence of annealing condition with various temperatures. As the annealing temperature increased, the crystalline orientation with the preference of (002) c-axis and resistance properties improved. The single resonator which was fabricated at $500^{\circ}C$ exhibited the resonance frequency and the return loss 0.99 GHz and 15 dB, respectively. This work demonstrates potential feasibility for the use of thin film Ru buffer layers and the optimization of annealing condition.

• E2M - 전기 전자와 첨단 소재
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• 제9권8호
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• pp.836-850
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• 1996

In this study, we have analyzed structural analysis and measured ferroelectric characteristics of PZT thin films prepared by sol gel process with different sintering conditions and different Zr/Ti mot%. When the Zr mot% of PZT thin film was increased, it was found that the remanent. polarization and coercive field were decreased and increased, respectively. Also, the maxium dielectric constant of PZT(50/50) thin film was 786.8. We got double hysteresis(anti-fcrroelectric) curve from PbZrO$_{3}$ thin film. As heating rate goes up, pyrochlore phase of PZT thin film was decreased and dielectric and ferroelectric characteristics were improved. As a result of variation of sintering temperature and time 500.deg. C-800.deg. C and 5 sec.-8 hours, respectively, we got optimal sintering temperature and time. The optimium sintering temperature and time of conventional furnace method and rapid thermal processing method were 650.deg. C-700.deg. C for 30-60 minutes and 700.deg. C/20 seconds-2 minutes, respectively.

• 한국전기전자재료학회논문지
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• 제36권6호
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• pp.588-593
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• 2023

The advantage of OTFT technology is that large-area circuits can be manufactured on flexible substrates using a low-cost solution process such as inkjet printing. Compared to silicon-based inorganic semiconductor processes, the process temperature is lower and the process time is shorter, so it can be widely applied to fields that do not require high electron mobility. Materials that have utility as electrode materials include carbon that can be solution-processed, transparent carbon thin films, and metallic nanoparticles, etc. are being studied. Recently, a technology has been developed to facilitate charge injection by coating the surface of the Al electrode with solution-processable titanium oxide (TiOx), which can greatly improve the performance of OTFT. In order to commercialize OTFT technology, an appropriate method is to use a complementary circuit with excellent reliability and stability. For this, insulators and channel semiconductors using organic materials must have stability in the air. In this study, carbon-doped Mo (MoC) thin films were fabricated with different graphite target power densities via unbalanced magnetron sputtering (UBM). The influence of graphite target power density on the structural, surface area, physical, and electrical properties of MoC films was investigated. MoC thin films deposited by the unbalanced magnetron sputtering method exhibited a smooth and uniform surface. However, as the graphite target power density increased, the rms surface roughness of the MoC film increased, and the hardness and elastic modulus of the MoC thin film increased. Additionally, as the graphite target power density increased, the resistivity value of the MoC film increased. In the performance of an organic thin film transistor using a MoC gate electrode, the carrier mobility, threshold voltage, and drain current on/off ratio (I_on/I_off) showed 0.15 cm²/V·s, -5.6 V, and 7.5×10⁴, respectively.