• Electrical & Electronic Materials
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• v.9 no.1
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• pp.30-37
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• 1996

Previously, crystallization of a-Si:H films on glass substrates were limited to anneal temperature below 600.deg. C, over 10 hours to avoid glass shrinkage. Our study indicates that the crystallization is strongly influenced by anneal temperature and weakly affected by anneal duration time. Because of the high temperature process and nonconducting substrate requirements for poly-Si TFTs, the employed substrates were limited to quartz, sapphire, and oxidized Si wafer. We report on poly-Si TFT's using high temperature anneal on a Si:H/Mo structures. The metal Mo substrate was stable enough to allow 1000.deg. C anneal. A novel TFT fabrication was achieved by using part of the Mo substrate as drain and source ohmic contact electrode. The as-grown a-Si:H TFT was compared to anneal treated poly-Si TFT'S. Defect induced trap states of TFT's were examined using the thermally stimulated current (TSC) method. In some case, the poly-Si grain boundaries were passivated by hydrogen. A-SI:H and poly-Si TFT characteristics were investigated using an inverted staggered type TFT. The poly -Si films were achieved by various anneal techniques; isothermal, RTA, and excimer laser anneal. The TFT on as grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. Some films were annealed at temperatures from 200 to >$1000^{\circ}C$ The TFT on poly-Si showed an improved $I_on$$I_off$ ratio of $10_6$, reduced gate threshold voltage, and increased field effect mobility by three orders. Inverter operation was examined to verify logic circuit application using the poly Si TFTs.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.8 no.5
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• pp.1013-1019
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• 2007

Amorphous silicon and silicon-nitride films were deposited using plasma-enhanced chemical vapor deposition (PECVD) method at $150^{\circ}C$. As fraction of $H_2$ in source gas was increased, characteristics of low-temperature silicon-nitride films approached those of conventional high-temperature films; the refractive index approached 1.9 and the ratio of nitrogen-hydrogen bonds to silicon-hydrogen bonds increased. And also, as fraction of $H_2$ in source gas was increased, characteristics of low-temperature silicon films approached those of conventional high-temperature films; refractive index and optical band gap approached 4.2 and 1.8 eV, and $[Si-H]/([Si-H]+[Si-H_2])$ increased. Lower RF power and process-pressure made the amorphous silicon films to be better properties. Increase of $H_2$ ratio seemed as the common factor to get reliable amorphous silicon and silicon-nitride films for thin-film-transistors (TFTs) at low temperature.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.321-322
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• 2006

The electrical properties of PZT thin film capacitor on TiN/W plug structure were investigated for high density ferroelectric memory devices. In order to enhance the ferroelectric properties of PZT capacitor, the process conditions of bottom electrodes were optimized. The fabricated PZT capacitor on TiN/W plug showed good remanent polarization, leakage current, and contact resistance of TiN/W plug, which were $33\;{\mu}C/cm^2$, $1.2{\times}10^{-6}\;A/cm^2$, and 5.3 ohm/contact, respectively.

• Membrane Journal
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• v.15 no.1
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• pp.34-43
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• 2005

The poly(vinyl alcohol) (PVA)-based thin film composite nanofiltration (NF) membranes were prepared by coating polysulfone ultrafiltration membranes, sulfonated polyethersulfone and polyamide NF membranes with aqueous PVA solution by a pressurizing method. The PVA was cross-linked with aqueous glutaraldehyde solution. The NF membranes coated with a very low concentration of PVA on all the support membranes was successfully prepared. With increasing the hydrophilicity of the support membranes, the water flux increased. Especially, ζ-potential of negatively charged polyamide NF membrane was reduced by coating the membrane with PVA. A fouling experiment was carried out with positively charged surfactant, humic acid, complex of humic acid and calcium ion and bovine serum albumin. A non-coated polyamide NF membrane was significantly fouled by various foulants. The fouling process when using humic acid and protein occurred at the isoelectric point. There was severe fouling when using humic acid and adding bivalent cations. By coating the polyamide NF membrane with aqueous PVA solution, fouling was reduced. The polyamide NF membrane coated with PVA was resistant to the acidic and basic solution.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.148.2-148.2
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• 2013

We prepared hydrophobic PDMS-coated porous silica as pre-concentration adsorbent for chemical warfare agents (CWAs). Since CWAs can be harmful to human even with a small amount, detecting low-concentration CWAs has been attracting attention in defense development. Porous silica is one of the promising candidates for CWAs pre-concentration adsorbent since it is thermally stable and its surface area is sufficiently high. A drawback of silica is that adsorption of CWAs can be significantly reduced due to competitive adsorption with water molecule in air since silica is quite hydrophilic. In order to solve this problem, hydrophobic polydimethylsiloxane (PDMS) thin film was deposited on silica. Adsorption and desorption of chemical warfare agent (CWA) simulants (Dimethylmethylphosphonate, DMMP and Dipropylene Glycol Methyl Ether, DPGEM) on bare and PDMS-coated silica were studied using temperature programed desorption (TPD) with and without co-exposing of water vapor. Without exposure of water vapor, desorbed amount of DMMP from PDMS-coated silica was twice larger than that from bare silica. When the samples were exposed to DMMP and water vapor at the same time, no DMMP was desorbed from bare silica due to competitive adsorption with water. On the other hand, desorbed DMMP was detected from PDMS-coated silica with reduced amount compared to that from the sample without water vapor exposure. Adsorption and desorption of DPGME with and without water vapor exposing was also investigated. In case of bare silica, all the adsorbed DPGME was decomposed during the heating process whereas molecular DPGME was observed on PDMS-coated silica. In summary, we showed that hydrophobic PDMS-coating can enhance the adsorption selectivity toward DMMP under humid condition and PDMS-coating also can have positive effect on molecular desorption of DPGME. Therefore we propose PDMS-coated silica could be an adequate adsorbent for CWAs pre-concentration under practical condition.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.30 no.5 s.248
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• pp.413-421
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• 2006

The bubble dynamics induced by direct laser heating is experimentally analyzed as a first step to assess the technical feasibility of laser-based ink-jet technology. To understand the interaction between laser light and ink, the absorption spectrum is measured for various ink colors and concentrations. The hydrodynamics of laser-generated bubbles is examined by the laser-flash photography. When an Ar ion laser pulse (wavelength 488 nm) with an output power up to 600 mW is incident on the ink solution through a transparent window, a hemispherical bubble with a diameter up to ${\sim}100{\mu}m$ can be formed with a lifetime in a few tens of microsecond depending on the laser power and the focal-spot size. Parametric study has been performed to reveal the effect of laser pulse width, output power, ink concentration, and color on the bubble dynamics. The results show that the bubble generated by a laser pulse is largely similar to that produced by a thin-film heater. Consequently, the present work demonstrates the feasibility of developing a laser-actuated droplet generation mechanism for applications in ink-jet print heads. Furthermore, the results of this work indicate that the droplet generation frequency is likely to be further increased by optimizing the process parameters.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2003.05a
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• pp.41-41
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• 2003

텅스텐(W)은 높은 thermal stability 와 process compatibility 및 우수한 corrosion r resistance 둥으로 integrated circuit (IC)의 gate 및 interconnection 둥으로의 활용이 대두되고 있으며, 차세대 thin film transistor liquid crystal display (TFT-LCD)의 gate 및 interconnection m materials 둥으로 사용되고 았다. 그러나, 이러한 장점을 가지고 있는 팅스텐 박막이 실제 공정상에 적용되가 위해서는 건식 식각이 주로 사용되는데, 이는 wet chemical 을 이용한 습식 식각을 사용할 경우 낮은 etch rate, line width 의 감소 및 postetch residue 잔류 동의 문제가 발생하기 때문이다. 또한 W interconnection etching 을 하기 위해서는 높은 텅스텐 박막의 etch rate 과 하부 layer ( (amorphous silicon 또는 poly-SD와의 높은 etch selectivity 가 필수적 이 라 할 수 있다. 그러 나, 지금까지 연구되어온 결과에 따르면 텅스탠과 하부 layer 와의 etch selectivity 는 2 이하로 매우 낮게 관찰되고 았으며, 텅스텐의 etch rate 또한 150nm/min 이하로 낮은 값을 나타내고 있다. 따라서 본 연구에서는 halogen-based inductively coupled plasma 를 이용하여 텅스텐 박막 식각시 여러 가지 첨가 가스에 따른 높은 텅스탠 박막의 etch rate 과 하부 layer 와의 높은 etch s selectivity 를 얻고자 하였으며, 그에 따른 식각 메커니즘에 대하여 알아보고자 하였다. $CF_4/Cl_2$ gas chemistry 에 첨 가 가스로 $N_2$와 Ar을 첨 가할 경 우 텅 스텐 박막과 하부 layer 간의 etch selectivity 증가는 관찰되지 않았으며, 반면에 첨가 가스로 $O_2$를 사용할 경우, $O_2$의 첨가량이 증가함에 따라 etch s selectivity 는 계속적으로 증가렴을 관찰할 수 있었다. 이는 $O_2$ 첨가에 따라 형성되는 WOF4 에 의한 텅스텐의 etch rates 의 감소에 비하여, $Si0_2$ 등의 형성에 의한 poly-Si etch rates 이 더욱 크게 감소하였기 때문으로 사료된다. W 과 poly-Si 의 식각 특성을 이해하기 위하여 X -ray photoelectron spectroscopy (XPS)를 사용하였으며, 식각 전후의 etch depth 를 측정하기 위하여 stylus p pmfilometeT 를 이용하였다.

• Journal of the Korean Applied Science and Technology
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• v.8 no.2
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• pp.105-114
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• 1991

In relation to the preparation of Langmuir-Blodgett thin film, four kinds of N-alkylpyridiniurn bromide were synthesized. The values of surface tensions of these materials, measured with a Traube stalagmometer, gave the relationship between the critical micells hydrophobic radical and between CMC and temperature. Values of thermodynamic properties(${\Delta}H^0_m,\;{\Delta}S^0_m,\;{\Delta}G^0_m,$) for the formatoin of micelle were also obtained. Experiments gave the following results; at the temperature range between 40 and 60$^{\circ}C, CMC of Hexadecyl-, Octadecyl-, Eicosyl-, and Docosyl-Pyridinium Bromide were $7.64{\times}10^{-4}{\sim}9.13{\times}10^{-4},\;3.85{\times}10^{-4}{\sim}4.60{\times}10^{-4},\;2.00{\times}10^{-4}{\sim}2.39{\times}10^{-4},\;and\;1.07{\times}10^{-4}{\sim}1.28{\times}10^{-4}$ mol/l, respectively. Surface tension, ${\Gamma}_{CMC}$, of those were 33.49${\sim}$36.00, 34.78${\sim}$37.61, 35.49${\sim}$37.61 and 38.76${\sim}$55.80 dyne/cm, respectively, The relationship between CMC and the mumber of carbon atoms in the hydrophobic radical, N was expressed as follows : Log(CMC)=A-BN where A and B are constants. At the temperature range between 40 and 60$^{\circ}C$, the change of Gibbs evergy (${\Delta}G_m$) for one methylene group ($-CH_2-$) were -0.65RT, respectively, The minus values of enthalpy change (${\Delta}H_m$) suggest that the formation of micelle is exothermic. Additionally, the overall increase in the entropy change (${\Delta}S_m$) with respect to the temperature increase suggests that the formation of micelle is attained by a exothermic enthalpy directed process.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.255-255
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• 2010

Recently, nonvolatile memories (NVM) of various types have been researched to improve the electrical performance such as program/erase voltages, speed and retention times. Also, the charge trap memory is a strong candidate to realize the ultra dense 20-nm scale NVM. Furthermore, the high charge efficiency and the thermal stability of SiC nanocrystals NVM with single $SiO_2$ tunnel barrier have been reported. [1-2] In this study, the SiC charge trap NVM was fabricated and electrical properties were characterized. The 100-nm thick Poly-Si layer was deposited to confined source/drain region by using low-pressure chemical vapor deposition (LP-CVD). After etching and lithography process for fabricate the gate region, the $Si_3N_4/SiO_2/Si_3N_4$ (NON) and $SiO_2/Si_3N_4/SiO_2$ (ONO) barrier engineered tunnel layer were deposited by using LP-CVD. The equivalent oxide thickness of NON and ONO tunnel layer are 5.2 nm and 5.6 nm, respectively. By using ultra-high vacuum magnetron sputtering with base pressure 3x10-10 Torr, the 2-nm SiC and 20-nm $SiO_2$ were successively deposited on ONO and NON tunnel layers. Finally, after deposited 200-nm thick Al layer, the source, drain and gate areas were defined by using reactive-ion etching and photolithography. The lengths of squire gate are $2\;{\mu}m$, $5\;{\mu}m$ and $10\;{\mu}m$. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer, E4980A LCR capacitor meter and an Agilent 81104A pulse pattern generator system. The electrical characteristics such as the memory effect, program/erase speeds, operation voltages, and retention time of SiC charge trap memory device with barrier engineered tunnel layer will be discussed.

• Korean Journal of Metals and Materials
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• v.50 no.8
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• pp.569-573
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• 2012

In order to understand the difference in SiC deposition between the $CH_3SiCl_3-H_2$ and $C_3H_8-SiCl_4-H_2$ systems, we calculate the phase stability among ${\beta}$-SiC, graphite and silicon. We constructed the phase-diagram of ${\beta}$-SiC over graphite and silicon via computational thermodynamic calculation considering pressure (P), temperature (T) and gas composition (C) as variables. Both P-T-C diagrams showed a very steep phase boundary between the SiC+C and SiC region perpendicular to the H/Si axis, and also showed an SiC+Si region with a H/Si value of up to 6700 in the $C_3H_8-SiCl_4-H_2$, and 5000 in the $CH_3SiCl_3-H_2$ system. This difference in phase boundaries is explained by the ratio of Cl to Si, which is 4 for the $C_3H_8-SiCl_4-H_2$ system and 3 for the $C_3H_8-SiCl_4-H_2$ system. Because the C/Si ratio is fixed at 1 in the $CH_3SiCl_3-H_2$ system while it can be variable in the $C_3H_8-SiCl_4-H_2$ system, the functionally graded material is applicable for better mechanical bonding during SiC coating on graphite substrate in the $C_3H_8-SiCl_4-H_2$ system.