• Title/Summary/Keyword: Thin Film Process

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Effects of post anneal for the INZO films prepared by ultrasonic spray pyrolysis

  • Lan, Wen-How;Li, Yue-Lin;Chung, Yu-Chieh;Yu, Cheng-Chang;Chou, Yi-Chun;Wu, Yi-Da;Huang, Kai-Feng;Chen, Lung-Chien
    • Advances in nano research
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    • v.2 no.4
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    • pp.179-186
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    • 2014
  • Indium-nitrogen co-doped zinc oxide thin films (INZO) were prepared on glass substrates in the atmosphere by ultrasonic spray pyrolysis. The aqueous solution of zinc acetate, ammonium acetate and different indium sources: indium (III) chloride and indium (III) nitrate were used as the precursors. After film deposition, different anneal temperature treatment as 350, 450, $550^{\circ}C$ were applied. Electrical properties as concentration and mobility were characterized by Hall measurement. The surface morphology and crystalline quality were characterized by SEM and XRD. With the activation energy analysis for both films, the concentration variation of the films at different heat treatment temperature was realized. Donors correspond to zinc related states dominate the conduction mechanism for these INZO films after $550^{\circ}C$ high temperature heat treatment process.

Development of High Performance Indium Tin Oxide Films at Room Temperature by Plasma-Damage Free Neutral Beam Sputtering System

  • Jang, Jin-Nyoung;Oh, Kyoung-Suk;Yoo, Suk-Jae;Kim, Dae-Chul;Lee, Bon-Ju;Yang, Ie-Hong;Moon, Ji-Sun;Kim, Jong-Sik;Choi, Soung-Woong;Park, Young-Chun;Hong, Mun-Pyo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1715-1718
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    • 2007
  • New ITO thin film of good performance has been developed by brand-new, plasma-damage-free sputtering process at the room temperature. The room temperature-processed ITO films with optimized conditions as neutral beam acceleration bias of -30V and In & Sn composition ratio of 99:01 gives lower resistivity as $4.22{\times}10^{-4}{\Omega}-cm$ and higher transmittance over 90% a wavelength of 550 nm. The transmission electron microscope (TEM) images of the films show a nano-crystalline structure.

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Fabrications and properties of MFIS capacitor using SiON buffer layer (SiON buffer layer를 이용한 MFIS Capacitor의 제작 및 특성)

  • 정상현;정순원;인용일;김광호
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.70-73
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    • 2001
  • MFIS(Metal-ferroelectric-insulator- semiconductor) structures using silicon oxynitride(SiON) buffer layers were fabricatied and demonstrated nonvolatile memory operations. Oxynitride(SiON) films have been formed on p-Si(100) by RTP(rapid thermal process) in O$_2$+N$_2$ ambient at 1100$^{\circ}C$. The gate leakage current density of Al/SiON/Si(100) capacitor was about the order of 10$\^$-8/ A/cm$^2$ at the range of ${\pm}$ 2.5 MV/cm. The C-V characteristics of Al/LiNbO$_3$/SiON/Si(100) capacitor showed a hysteresis loop due to the ferroelectric nature of the LiNbO$_3$ thin films. Typical dielectric constant value of LiNbO$_3$ film of MFIS device was about 24. The memory window width was about 1.2V at the electric field of ${\pm}$300 kV/cm ranges.

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Box Cathode Sputtering Technologies for Organic-based Optoelectronics (유기물 광전소자 제작을 위한 박스 캐소드 스퍼터 기술)

  • Kim, Han-Ki
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.4
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    • pp.373-378
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    • 2006
  • We report on plasma damage free-sputtering technologies for organic light emitting diodes (OLEDs), organic thin film transistor (OTFT) and flexible displays by using a box cathode sputtering (BCS) method. Specially designed BCS system has two facing targets generating high magnetic fields ideally entering and leaving the targets, perpendicularly. This target geometry allows the formation of high-density plasma between targets and enables us to realize plasma damage free sputtering on organic layer without protection layer against plasma. The OLED with Al cathode prepared by BCS shows electrical and optical characteristics comparable to OLED with thermally evaporated Mg-Ag cathode. It was found that OLED with Al cathode layer prepared by BCS has much lower leakage current density ($1{\times}10^{-5}\;mA/cm^2$ at -6 V) than that $(1{\times}10^{-2}{\sim}-10^0\;mA/cm^2)$ of OLED prepared by conventional DC sputtering system. This indicates that BCS technique is a promising electrode deposition method for substituting conventional thermal evaporation and DC/RF sputtering in fabrication process of organic based optoelectronics.

Analytical Methodology and Design Consideration of Advanced Test Structure for the Micromechanical Characteristics of MEMS device (초소형 박막구조물의 기계적 특성 평가소자 설계 및 분석 기법)

  • Lee, Se-Ho;Park, Byung-Woo;kwon, Dong-Il
    • Proceedings of the KIEE Conference
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    • 1998.11c
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    • pp.1010-1013
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    • 1998
  • In micromechanical system (MEMS) such as microactuators. thin film has been widely used as structural material. MEMS materials have difference with bulk in terms of mechanical properties. So, we design the advanced test structure for micromechanical properties of MEMS. The designed structure includes the newly developed pre-crack and it is driven by electrostatic force. To measure the fracture toughness, the pre-crack formation in the test structure is developed with conventional etching process. The advanced test structure is fabricated by application of semiconductor technology. After this, we propose analytical methodology to evaluate the fracture toughness and fatigue properties through a prediction of crack behavior from the variations of stiffness and frequency. Additionally, life time of a mirror plane used in DVD(Digital Video Disk) is measured as a function of capacitance and applied voltage under the accelerated conditions. Ultimately, we propose the method to evaluate the micromechanical reliabilities of the MEMS materials using the advanced test structure.

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A development of fabrication processes of microstructure using SU-8 PR (SU-8 PR을 이용한 마이크로 구조물 제작 공정 개발)

  • 김창교;장석원;노일호
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.13 no.2
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    • pp.68-72
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    • 2003
  • In this paper, we developed a new thick photoresist fabrication technology for 3-dimensional microstructures. In general, like as AZ photoresist was coated with thin film thickness about 1 $\mu\textrm{m}$ to 30 $\mu\textrm{m}$, but photoresist like SU-8 has thickness of several tens $\mu\textrm{m}$ or more and high aspect ratio. When we fabricate a microstructure using the thick photoresist like SU-8, cracks on the SU-8 thick photoresist are appeared by stress which was caused by sudden cooling down during bake of the thick photoresist spun on wafer. Thus, it was hard to fabricate the microstructure using the thick photoresist for electroplating. In this paper, we developed a new process to produce a 3-dimensional microstructure without the crack by stress through a suitable thick photoresist coating, time control of cool down and time control of PEB (Post Expose Bake).

Computer simulation of electric field distribution in FALC process (FALC 공정에서의 전계 분포 전산모사)

  • 정찬엽;최덕균;정용재
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.13 no.2
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    • pp.93-97
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    • 2003
  • The crystallization behavior of amorphous silicon is affected by direction and intensity of electric field in FALC(Field-Aided Lateral Crystallization). Electric field was calculated in a simplified model using conductivity data of Mo, a-Si, $SiO_2$and boundary conditions for electric potential at the electrodes. The magnitude of electric field intensity in each corner of cathode was much larger than that in the center of patterns, and the electric field direction was 50~60 degree outside to cathode. And electric field intensity at a relatively small pattern was larger than that of a large pattern.

Fabrication of the solution-processible OLED/OTFT by the gravure printing/contact transfer: role of the surface treatment

  • Na, Jung-Hoon;Kim, Sung-Hyun;Kang, Nam-Su;Yu, Jae-Woong;Im, Chan;Chin, Byung-Doo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.1638-1641
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    • 2008
  • We have investigated the effectiveness of a gravure printing method for the fabrication of organic light-emitting diode (OLED) and Organic Thin Film Transistor (OTFT). Printing of the organic layers was performed with a small-scale gravure coating machine, while the metallic layers were vacuum-evaporated. Devices with gravure-printed layers are at least comparable with the spin-coated devices. Effects of the solvent formulation and surface energy mismatch between the organic layer materials on the printed patterns and device performance were discussed. We will present the initial design and experimental data of OTFT fabricated by roll-type soft contact transfer process.

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Characteristics of Pentacene Organic Thin-Film Transistors with $PVP-TiO_2$ as a Gate Insulator

  • Park, Jae-Hoon;Kang, Sung-In;Jang, Seon-Pil;Kim, Hyun-Suck;Choi, Hyoung-Jin;Choi, Jong-Sun
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07b
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    • pp.1301-1305
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    • 2005
  • The performance of OTFT with $PVP-TiO_2$ composite, as a gate insulator, is reported, including the effect of surfactant for synthesizing the composite material. According to our investigation results, it was one of critical issues to prevent the aggregation of $PVP-TiO_2$ particles during the synthesis process. From this point of view, $PVP-TiO_2$ particles were treated using Tween80, as a surfactant, and we could reduce the aggregated $PVP-TiO_2$ clusters. As a result, the OTFT with the composite insulator showed the threshold voltage of about -8.3 V and the subthreshold slope of about 1.5 V/decade, which are the optimized properties compared to those of OTFTs with bare PVP, in this study. It is thought that these characteristic improvements are originated from the increase in the dielectric constant of the PVP-based insulator by compositing with high-k particles.

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Photoalignment of Liquid Crystal on Silicon Microdisplay

  • Zhang, Baolong;Li, K. K.;Huang, H. C.;Chigrinov, V.;Kwok, H. S.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2003.07a
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    • pp.295-298
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    • 2003
  • Reflective mode liquid crystal on silicon (LCoS) microdisplay is the major technology that can produce extremely high-resolution displays. A very large number of pixels can be packed onto the CMOS circuit with integrated drivers that can be projected to any size screen. Large size direct-view thin film transistor (TFT) LCDs becomes very difficult to make and to drive as the information content increases. However, the existing LC alignment technology for the LCoS cell fabrication is still the mechanical rubbing method, which is prone to have minor defects that are not visible normally but can be detrimental if projected to a large screen. In this paper, application of photo-alignment to LCoS fabrication is presented. The alignment is done by three-step exposure process. A MTN $90^{\circ}$ mode is chose as to evaluate the performance of this technique. The comparison with rubbing mode shows the performance of photo-alignment is comparable and even better in some aspect, such as sharper RVC curve and higher contrast ratio.

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