• Title/Summary/Keyword: Thin Film, Sensor

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A Study on Short Channel Effects of n Channel Polycrystalline Silicon Thin Film Transistor Fabricated at High Temperature (고온에서 제작된 n채널 다결정 실리콘 박막 트랜지스터의 단채널 효과 연구)

  • Lee, Jin-Min
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.5
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    • pp.359-363
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    • 2011
  • To integrate the sensor driver and logic circuits, fabricating down scaled transistors has been main issue. At this research, short channel effects were analyzed after n channel polycrystalline silicon thin film transistor was fabricated at high temperature. As a result, on current, on/off current ratio and transconductance were increased but threshold voltage, electron mobility and s-slope were reduced with a decrease of channel length. When carriers that develop at grain boundary in activated polycrystalline silicon have no gate biased, on current was increased with punch through by drain current. Also, due to BJT effect (parallel bipolar effect) that developed under region of channel by increase of gate voltage on current was rapidly increased.

CMP properties of $SnO_2$ thin film ($SnO_2$ 박막의 CMP 특성)

  • Choi, Gwon-Woo;Lee, Woo-Sun;Ko, Pil-Ju;Kim, Tae-Wan;Seo, Yong-Jin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.04b
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    • pp.93-96
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    • 2004
  • As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing (CMP) process was required for the global planarization of inter-metal dielectric(IMD) layer with free-defect. The effect of alternative commerical slurries pads, and post-CMP cleaning alternatives are discuess, with removal rate, scratch dentisty, surface roughness, dishing, erosion and particulate density used as performance metrics. we investigated the performance of $SnO_2$-CMP process using commonly used silica slurry, ceria slurry, tungsten slurry. This study shows removal rate and nonuniformity of $SnO_2$ thin film used to gas sensor by using Ceria, Silica, W-Slurry after CMP process. This study also shows the relation between partical size and CMP with partical size analysis of used slurry.

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Comparison of the Performance of Thin Film Pressure Sensors with Polyimid and Silicon Oxide as a Insulating Layer (절연층으로 폴리이미드와 실리콘 산화막을 사용한 박막 압력 센서의 특성 비교)

  • Min, Nam-Ki;Lee, Seong-Rae;Chun, Jae-Hyung;Kim, Jeong-Wan
    • Proceedings of the KIEE Conference
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    • 1997.11a
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    • pp.296-298
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    • 1997
  • The performance of thin film pressure sensors with polyimide and silicon oxide as a insulating layer between the stainless steel diaphragm and the Cu-Ni strain gauges is presented. The polyimide was spun on the stainless steel diaphragm and cured in an oven. The silicon oxide was deposited by rf sputtering. The thin film pressure sensor with silicon oxide as a insulating layer showed a better nonlinearity and a lower hysteresis.

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Low-voltage Organic Thin-film Transistors with Polymeric High-k Gate Insulator on a Flexible Substrates (고유전율 절연체를 활용한 저 전압 유연 유기물 박막 트랜지스터)

  • Kim, Jae-Hyun;Bae, Jin-Hyuk;Lee, In-ho;Kim, Min-Hoi
    • Journal of Sensor Science and Technology
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    • v.24 no.3
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    • pp.165-168
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    • 2015
  • We demonstrated low-voltage organic thin-film transistors (OTFTs) with bilayer insulators, high-k polymer and low temperature crosslinkable polymer, on a flexible plastic substrate. Poly (vinylidene fluoridetrifluoroethylene) (P(VDF-TrFE)) and poly (2-vinylnaphthalene) are used for high-k polymer gate insulator and low temperature crosslinkable polymer insulators, respectively. The mobility of flexible OTFTs is $0.17cm^2/Vs$ at gate voltages -5 V after bending operation.

A Researching about Reducing Leakage Current of Polycrystalline Silicon Thin Film Transistors with Bird's Beak Structure (누설전류 감소를 위한 Bird's Beak 공정을 이용한 다결정 실리콘 박막 트랜지스터의 구조 연구)

  • Lee, Jin-Min
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.2
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    • pp.112-115
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    • 2011
  • To stabilize the electric characteristic of Silicon Thin Film Transistor, reducing the current leakage is most important issue. To reduce the current leakage, many ideas were suggested. But the increase of mask layer also increased the cost. On this research Bird's Beak process was use to present element. Using Silvaco simulator, it was proven that it was able to reduce current leakage without mask layer. As a result, it was possible to suggest the structure that can reduce the current leakage to 1.39nA without having mask layer increase. Also, I was able to lead the result that electric characteristic (on/off current ratio) was improved compare from conventional structure.

Investigation of Giant Magnetoresistance in Vacuum-Annealed NiFe/Ag Discontinuous Multilayers

  • Park, Chang-Min;Kim, Young-Eok;Shin, Kyung-Ho
    • Journal of Magnetics
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    • v.2 no.2
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    • pp.50-54
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    • 1997
  • The vacuum-annealed Ni80Fe20/Ag discontinuous multilayers were found to show giant magnetoresistive behaviors comparable to those of corresponding multilayers annealed at atmospheric pressure in a mixture of H2 and Ar. This vacuum-annealing process will offer potential advantages, enabling a continuous batch process from the deposition to the annealing. Their giant magnetoresistive behaviors were attributed to the magnetostatic coupling that are induced at the edges of the discontinuous magnetic grains. We also present our results about the multilayer patterned into a basic device for the magnetic field sensor.

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Highly-Efficient Optical Gating in Vanadium Dioxide Junction Device

  • Lee, Yong-Wook
    • Journal of Sensor Science and Technology
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    • v.20 no.4
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    • pp.230-233
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    • 2011
  • In this paper, highly-efficient optical gating in a junction device based on vanadium dioxide($VO_2$) thin film grown by a sol-gel method was investigated as a gate terminal of a three-terminal device using infrared light with a wavelength of ~1554.6 nm. Due to the photoinduced phase transition, the threshold voltage of the $VO_2$ junction device, at which the device current abruptly jumps, could be tuned with a sensitivity of ~96.5 V/W by adjusting the optical power of the infrared light directly illuminating the device. Compared with the tuning efficiency of the previous device fabricated using $VO_2$ thin film deposited by a pulsed laser deposition method, the threshold voltage of this device could be tuned by ~76.8 % at an illumination power of ~39.8 mW resulting in a tuning efficiency of ~1.930 %/mW, which is ~4.9 times larger than the previous device.

CMP properties of $SnO_2$ thin film by different slurry (슬러리 종류에 따른 $SnO_2$ 박막의 광역평탄화 특성)

  • Lee, Woo-Sun;Choi, Gwon-Woo;Ko, Pil-Ju;Kim, Wan-Tae;Seo, Yong-Jin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.07a
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    • pp.389-392
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    • 2004
  • As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing (CMP) process was required for the global planarization of inter-metal dielectric(IMD) layer with free-defect. The effect of alternative commerical slurries pads, and post-CMP cleaning alternatives are discuess, with removal rate, scratch dentisty, surface roughness, dishing, erosion and particulate density used as performance metrics. we investigated the performance of $SnO_2$-CMP process using commonly used silica slurry, ceria slurry, tungsten slurry. This study shows removal rate and non-uniformity of $SnO_2$ thin film used to gas sensor by using Ceria, Silica, W-Slurry after CMP process. This study also shows the relation between particle size and CMP with particle size analysis of used slurry.

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CMP properties of $SnO_2$ thin film ($SnO_2$ 박막의 CMP 특성)

  • Lee, Woo-Sun;Choi, Gwon-Woo;Ko, Pil-Ju;Hong, Kwang-Jun;Seo, Young-Jin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.11a
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    • pp.184-187
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    • 2003
  • As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing (CMP) process was required for the global planarization of inter-metal dielectric(IMD) lyaer with free-defect. The effect of alternative commerical slurries pads, and post-CMP cleaning alternatives are discuess, with removal rate, scratch dentisty, surface roughness, dishing, erosion and particulate density used as performance metrics. we investigated the performance of $SnO_2-CMP$ process using commonly used silica slurry, ceria slurry, tungsten slurry. This study shows removal rate and nonuniformity of $SnO_2$ thin film used to gas sensor by using Ceria, Silica, W-Slurry after CMP process. This study also shows the relation between partical size and CMP with partical size analysis or used slurry.

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Development of Real Time Thickness Measurement System of Thin Film for 12" Wafer Spin Etcher (12" 웨이퍼 Spin etcher용 실시간 박막두께 측정장치의 개발)

  • 김노유;서학석
    • Journal of the Semiconductor & Display Technology
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    • v.2 no.2
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    • pp.9-15
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    • 2003
  • This paper proposes a thickness measurement method of silicon-oxide and poly-silicon film deposited on 12" silicon wafer for spin etcher. Halogen lamp is used as a light source for generating a wide-band spectrum, which is guided and focused on the wafer surface through a optical fiber cable. Interference signal from the film is detected by optical sensor to determine the thickness of the film using spectrum analysis and several signal processing techniques including curve-fitting and adaptive filtering. Test wafers with three kinds of priori-known films, polysilicon(300 nm), silicon-oxide(500 nm) and silicon-oxide(600 nm), are measured while the wafer is spinning at 20 Hz and DI water flowing on the wafer surface. From experiment results the algorithm presented in the paper is proved to be effective with accuracy of maximum 0.8% error.rror.

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