• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.10
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• pp.35-41
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• 1992

Ultra-thin silicon nitride films were fabricated with ECR(Electron cyclotron Resonance) nitrogen plasma at room temperature. Film thickness was about 50$\AA$ after nitridation for 1min at microwave power of 1000W, RF power of 500W, and NS12T pressure of ${\times}10^{-3}$ torr. 50$\AA$ fo nitride film was grown within 1 min and no appreciable growth occured thereafter. Dielectric breakdown strength and leakage current density in Al/SiN/Si structure were measured to be about 7-11 MV/cm and ${\times}10^{-10}~5{\times}10^{-10}A/cm^{2}$, respectively. Observed linear relationship in 1n(J/E)-vs-E$^{1/2}$ and no polarity-dependence of the leakage current indicated that the Poole-Frenkel emission is mainly responsible for the conduction in this nitrided silicon films.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.2
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• pp.128-132
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• 1998

2/65/35 PLZT stock solution prepared by Sol-Gel processing was spin-coated on ITO coated glass and annealed by RTA(Rapid Thermal Annealing). The crystal structure of films was reported based on the observation of crystallization process and microstructure of the film fabricated at different fabrication condition. Films were crystallized into rhombohedral structure by annealing at $750^{\circ}C$ for 5 min. As the annealing temperature increased, the size of rosette structure of the films was grown up from $2.4{\mu}m$ to $15{\mu}m$, dielectric constant was increased, coercive field was decreased 33.82 kV/cm, remnant polarization was increased to 39.84 ${\mu}C/cm^2$ and Optical transmittance was decreased.

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.184-187
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• 2002

In this work, the electrical characteristics of organic thin film transistors with the stacked organic gate insulators have been studied. PVP(Polyvinylphenol) and polystyrene were used as gate insulating materials. Both the high dielectric constant of PVP and better insulating capability of polystyrene were compensatorily adopted in two different stacking orders of PVP-polystyrene and polystyrene-PVP. The output characteristics of the device with the stacked gate insulator showed substantial improvement compared with those of the devices with either PVP or polystyrene gate insulator: Furthermore, these stacked organic gate insulators can differently affect the TFT characteristics with the stacking orders. The electrical properties of TFTs with organic gate insulators stacked in different orders are discussed.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2006.05a
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• pp.591-592
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• 2006

We studied about the manufacture of the drain-source contacts for OTFTs(organic thin-film transistors) by using screen printing method. The conductive fillers used Ag and carbon black. The conductive contacts with $100{\mu}m$ of channel length were screen printed on a silicon dioxide gate dielectric layer and, the pentacene semiconductor was deposited via vacuum deposition. As a result of studying various conductive pastes, we could obtain the OTFTs which exhibited field-effect behavior over arrange of drain-source and gate voltages, similar to devices employing deposited Au contacts. By using screen-printing with conductive paste, the contacts are processed at low temperature, thereby facilitating their integration with heat sensitive substrates.

• 한국정보디스플레이학회:학술대회논문집
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• 2000.01a
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• pp.37-38
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• 2000

The ZnS:Tb thin-film electroluminescent devices were grown by atomic layer deposition with utilizing single-layer aluminum oxide and/or multilayered tantalum aluminum oxide, $Ta_xAl_yO$, as upper and lower insulating layers. These devices were investigated in terms of the luminescent and electrical characteristics. From this analysis, the devices using the $Ta_xAl_yO$ instead of $Al_2O_3$ were observed to have a lower threshold voltage for emission due to the higher relative dielectric constant of $Ta_xAl_yO$ insulators than that of the $Al_2O_3$ device. And there was a large amount of dynamic space charge generation in the phosphor of the device with the $Ta_xAl_yO$ insulators seemingly due to electron multiplication such as trap ionization.

• Transactions on Electrical and Electronic Materials
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• v.16 no.4
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• pp.187-189
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• 2015

A charge-trap flash (CTF) thin film transistor (TFT) memory is proposed at a low-temperature process (≤ 450℃). The memory cell consists of a sputtered oxide-nitride-oxide (ONO) gate dielectric and Schottky barrier (SB) source/drain (S/D) junctions using nickel silicide. These components enable the ultra-low-temperature process to be successfully achieved with the ONO gate stacks that have a substrate temperature of room temperature and S/D junctions that have an annealing temperature of 200℃. The silicidation process was optimized by measuring the electrical characteristics of the Ni-silicided Schottky diodes. As a result, the Ion/Ioff current ratio is about 1.4×10⁵ and the subthreshold swing and field effect mobility are 0.42 V/dec and 14 cm²/V·s at a drain voltage of −1 V, respectively.

• Journal of the Korean Ceramic Society
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• v.38 no.5
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• pp.492-498
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• 2001

Ba$_{0.5}$Sr$_{0.5}$TiO$_3$타겟을 이용 Pt/Ti/SiO/Si 기판 위에 R.F magnetron sputtering 방법으로 BST 박막을 증착하여 다양한 열처리 조건에 따른 BST 박막의 전기적 성질(정전용량, 누설전류)에 대해 박막의 결정성과 미세구조의 연관성에 대하여 연구하였다. BST 박막의 유전상수는 grain size에 영향 받으며, 열처리 온도가 증가할수록 유전상수는 증가함을 보였고 온도에 따른 누설전류는 저전압 영역에서는 Hopping conduction, 고전압 영역에서는 Schottky conduction mechanism을 따르는 것으로 나타났다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.264-264
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• 2008

We fabricated a pentacene thin-film transistor with a Polymer/$SiO_2$ Double Gate Dielectrics and obtained a device with better electrical characteristics. This device was found to have a field-effect mobility of $0.04cm^2$/Vs, a threshold voltage of -2V, an subthreshold slope of 1.3 V/decade, and an on/off current ratio of $10^7$.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1494-1495
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• 2009

Thin Film Transistor(TFT) having CIS (CuInSe) semiconductor layer was fabricated and characterized. Heavily doped Si was used as a common gate electrode and PECVD Silicon nitride ($SiN_x$) was used as a gate dielectric material for the TFT. Source and drain electrodes were deposited on the $SiN_x$ layer and CIS layer was formed by a direct patterning method between source and drain electrodes. Nanoparticle of CIS material was used as the ink of the direct patterning method.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.312-314
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• 2009

We have fabricated pentacene based organic thin film transistors (OTFTs) with formulated poly[4-vinylphenol] (PVP) gate dielectrics. The gate dielectrics is composed of PVP, poly[melamine-coformaldehyde] (PMF) and photo-initiator [1-phenyl-2-hydroxy-2-methylpropane-1-one, Darocur1173]. By adding small amount (1 %) of photo-initiator, the cross-linking temperature is lowered to $115^{\circ}C$, which is lower than general thermal curing reaction temperature of cross-linked PVP (> $180^{\circ}C$). The hysteresis and the leakage current of the OTFTs are also decreased by adding the PMF and the photoinitiator in PVP gate dielectrics.