• 한국세라믹학회지
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• 제36권9호
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• pp.893-900
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• 1999

Silica films were prepared on Si single crystal substrates by sol-gel process using TEOS as starting materials. Films were fabricated by a spin coating technique. Sol solutions were prepared by varying the compositions of CH3OH, H2O and DMF with fixed molar ratio of TEOS=1, HCl=0.05(mol). Wetting behavior viscosity of solutions gelation time thickness of films and cracking behavior were investigated with the various solution compositions. Wetting behaviors of solutions depended on the solution compositions mixing method and mixing rate. The optimum composition of sol was TEOS : DMF ; CH3OH: H2O :HCl=1:2:4:4:0.05(mol) and the mixing rate of solution was optimized at 1 ml/min. Viscosity of solutions were controlled by choosing a reaction time(elapsed time after mixing) at a room temperature so that we could get up to 800nm thick film The surface roughness was getting poor when thickness of films was thicker than 500nm. Thickness of coated films were increased with decreasing amount of CH3OH. The best surface roughness was obtained at the content of CH3OH 4 mol. The shortest gelation time was obtained with the content of CH3OH 8 mol. Crack-free filkms were fabricated when sintered at 500$^{\circ}C$ for 1 hr with heating rate of 0.6$^{\circ}C$/min.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.2
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• pp.735-738
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• 2003

Downsizing electronics requires precision position control with an accuracy of sub-micron order, which demands development of ultra-fine displacive devices. Piezoelectric transducer is one of devices transferring electric field energy into mechanical energy and being capable for fine displacement control. The transducer has been widely used as fine Position control device Multilayer piezoelectric actuator, one of typical piezo-transducer, is fabricated by stacking alternatively ceramic and electrode layers several hundred times followed by cofiring process. Electrode material should be tolerable in the firing process maintaining at ceramic-sintering temperatures up to $1100{\sim}1300^{\circ}C$. Ag-Pd can be used as stable electrode material in heat treatment above $960^{\circ}C$. Besides, adding small quantity ceramic powder allow the actuator to be fabricated in a good shape by diminishing shrinkage difference between ceramic and electrode layers, resulting in avoidance of crack and delamination at and/or nearby interface between ceramic an electrode layers. This study presents synthesis of nano-oxide-added Ag/Pd powders and its feasibility to candidate material tolerable at high temperature. The powders were formed in a co-precipitation process of Ag and Pd in nano-oxide-dispersed solution where Ag and Pd precursors are melted in $HNO_3$ acid.

• 한국전기전자재료학회논문지
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• 제37권2호
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• pp.119-132
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• 2024

Dielectric ceramic capacitors present high output power density due to the fast energy charge and discharge nature of dielectric polarization. By forming dense ceramic films with nano-grains through the Aerosol Deposition (AD) process, dielectric ceramic capacitors can have high dielectric breakdown strength, high energy storage density, and leading to high power density. Dielectric capacitors fabricated by AD process are expected to meet the increasing demand in applications that require not only high energy density but also high power output in a short time. This article reviews the recent progress on the dielectric ceramic capacitors with improved energy storage properties through AD process, including energy storage capacitors based on both leadbased and lead-free dielectric ceramics.

• 한국재료학회지
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• 제3권4호
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• pp.352-360
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• 1993

열산화막위에 LPCVD법을 이용하여 질화막을 형성시킨 후, 질화막의 열처리 유무와 습식재산화처리의 공정조건에 따른 다양한 막의 두께를 가진 ONO(oxide nitride oxide)캐패시터를 제작하여 여러가지 물성을 조사하였다. 질화막을 습식산화처리하여 전체막의 굴절윷과 식각거동을 관찰한 결과, 40$\AA$두께의 질화막은 치밀하지 못하여 계속되는 산화공정동안에 하부층 산화막이 성장되었고 정전용량의 확보능력도 떨어졌다. ONO다층유전박막의 전도전류는 하부층 혹은 상부층 산화막의 두께가 증가함에 따라 감소하였다. 그러나 산화막이 50$\AA$ 이상인 경우에는 정전용량의 감소요인으로 작용할 뿐, hole유입에 대한 barrier역할은 크게 향상되지 못하였다. 산화전 질화막에 대한 열처리 효과는 막의 굴절율과 정전용량에 큰 영향을 주지 못하였으나 절연파괴전압은 약 2-3V 상승효과를 보였다.

• 한국결정성장학회지
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• 제28권1호
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• pp.14-20
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• 2018

에어로졸 증착법에 의해서 상온에서 $6{\mu}m/min$의 속도로 $5{\sim}10{\mu}m$ 두께의 PZT-PZN(0 %, 20 %, 40 %) 복합체의 막을 실리콘/사파이어 기판위에서 제조하였다. 에어로졸 증착에 사용된 PZT, 2PZN-8PZT, 4PZN-6PZT 초기분말입자는 불규칙한 형상을 가지고 있으며 submicron 크기임을 확인하였다. 증착된 막은 어떠한 뜯김이나 기공도 없는 치밀한 막임을 확인하였고 나노크기의 입자를 가진 페로브스카이트 단상이었다. 실리콘기판 및 사파이어 기판위에서 증착된 막은 전기로에서 $700^{\circ}C$ 및 $900^{\circ}C$에서 각각 어닐링처리 하였으며 PZT에 40 %의 PZN이 첨가된 조성의 막의 경우 pyrochlore의 2차상이 형성되었다. 미세구조에 미치는 PZN 첨가의 영향을 관찰하기 위해 FE-SEM 및 HR-TEM이 사용되었다.

• 한국전기전자재료학회논문지
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• 제30권11호
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• pp.683-687
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• 2017

We investigated the structure of an ultra-thin insulating board with low thermal conductivity along z-axis, which was based on the idea of void layers created during the glass infiltration process for the zero-shrinkage low-temperature co-fired ceramic (LTCC) technology. An alumina and four glass powders were chosen and prepared as green sheets by the tape casting method. After comparison of the four glass powders, bismuth glass was selected for the experiment. Since there is no notable reactivity between alumina and bismuth glass, alumina was selected as the supporting additive in glass layers. With 2.5 vol% of alumina powder, glass green sheets were prepared and stacked alternately with alumina green sheet to form the 'alumina/glass (including alumina additive)/alumina' structure. The stacked green sheets were sintered into an insulating substrate. Scanning electron microscopy revealed that the additive alumina formed supporting bridges in void layers. The depth and number of the stacking layers were varied to examine the insulating property. The lowest thermal conductivity obtained was 0.23 W/mK with a $500-{\mu}m-thick$ substrate.

• Journal of Electrical Engineering and information Science
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• 제3권2호
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• pp.239-244
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• 1998

Piezoelectric pressure sensors and pyroelectric infrared detectors based on ZnO thin film have been integrated with GaAs metal-semiconductor field effect transistor (MESFET) amplifiers. Surface micromachining techniques have been applied in a GaAs MESFET process to form both microsensors and electronic circuits. The on-chip integration of microsensors such as pressure sensors and infrared detectors with GaAs integrated circuits is attractive because of the higher operating temperature up to 200 oC for GaAs devices compared to 125 oC for silicon devices and radiation hardness for infrared imaging applications. The microsensors incorporate a 1${\mu}$m-thick sputtered ZnO capacitor supported by a 2${\mu}$m-thick aluminum membrane formed on a semi-insulating GaAs substrate. The piezoelectric pressure sensor of an area 80${\times}$80 ${\mu}$m2 designed for use as a miniature microphone exhibits 2.99${\mu}$V/${\mu}$ bar sensitivity at 400Hz. The voltage responsivity and the detectivity of a single infrared detector of an area 80${\times}$80 $\mu\textrm{m}$2 is 700 V/W and 6${\times}$108cm$.$ Hz/W at 10Hz respectively, and the time constant of the sensor with the amplifying circuit is 53 ms. Circuits using 4${\mu}$m-gate GaAs MESFETs are fabricated in planar, direct ion-implanted process. The measured transconductance of a 4${\mu}$m-gate GaAs MESFET is 25.6 mS/mm and 12.4 mS/mm at 27 oC and 200oC, respectively. A differential amplifier whose voltage gain in 33.7 dB using 4${\mu}$m gate GaAs MESFETs is fabricated for high selectivity to the physical variable being sensed.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.359-359
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• 2014

In this study, surface plasmon resonance structures for the selective and the enhanced transmission of infrared light were designed. In order to relieve the large discontinuity of refractive index between air and metal hole array, $Si_3N_4$ was used as the impedance matching layer. Experimental parameter were calculated and determined in advance by the rigorous coupled wave analysis (RCWA) simulation, and then the experiment was carried out. A 2-dimensional metal hole array structures were patterned on the size of $1{\times}1cm^2$ GaAs substrate using photolithography process, and 5 nm thick Ti, 50 nm thick Au were deposited by E-beam evaporator, respectively. Subsequently, $Si_3N_4$ films with various thicknesses (150, 350, 550, and 750 nm) were deposited by plasma enhanced chemical vapor deposition (PECVD). For the comparison, transmittance of specimens with and without $Si_3N_4$ was measured using Fourier transform infrared spectroscopy (FTIR) in the range of $2.5-15{\mu}m$. Furthermore, the surface and the cross-sectional images were collected from the specimens by scanning electron microscopy (SEM). From the results, it was demonstrated that the transmittance was enhanced up to 80% by the deposition of 750 nm $Si_3N_4$ at $6.23{\mu}m$. It has advantage of enhanced transmission despite the simple fabrication process.

• 한국정보통신학회논문지
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• 제10권9호
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• pp.1641-1647
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• 2006

나노입자 크기를 가진 얇은 $SnO_2$ 박막을 이용하여 CO 및 $H_2S$에 대한 우수한 감도를 가지는 복합 마이크로 가스센서 어레이를 제작하였다. 나노입자의 박막을 만들기 위해서 약 $2500{\AA}$ 두께의 $SnO_2,\;SnO_2(+Pt),\;SnO_2(+CuO)$ 막을 셰도우마스크를 사용하여 형성 한 후, 이를 $600{\sim}800^{\circ}C$의 온도에서 산화하므로서 나노입자의 $SnO_2$ 모물질의 가스감지 박막을 형성하였다. 실리콘 기판의 마이크로센서의 형태로 제작된 $SnO_2(Pt)$ 및 $SnO_2(+CuO)$ 가스센서는 각각 CO 및 $H_2S$ 가스에 대한 매우 우수한 감도를 나타내는 것을 확인하였다.

• 한국진공학회지
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• 제17권2호
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• pp.165-169
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• 2008

반도체 소자공정에서 균일한 두께의 금속박막을 증착하는 것은 매우 중요하다. 기존의 기판고정식 sputtering 장비로 증착한 indium tin oxide(ITO)박막의 두께 균일도가 $\pm4%\sim\pm5%$ 정도로 중앙부분이 더 두껍다. 방전전극 구조물을 설계하고 제작하여 sputtering되는 물질의 방향을 조절하였다. 개량된 sputtering gun을 사용하여 기판고정식 sputtering 장비에서 4" wafer 내에서 $\pm0.8\sim1.3%$ 정도로 두께 균일도를 증가시켰다. wafer to wafer에서는 $\pm$5.3%에서 $\pm$1.5%로 두께 균일도가 향상되었다. Al박막의 경우 $\pm$1.0% 이내의 두께 균일도를 얻을 수 있었다.