• Title/Summary/Keyword: Thermally stimulated current

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A Estimation of Ionic Space Charge Polarization in Polyimide by TSC (폴리이미드에서 TSC에 의한 이온성 공간전하분극의 평가)

  • Lee, Won-Jae;Lee, Sung-Il;Lee, Ho-Sik;Jang, Kyung-Uk;Choi, Myong-Kyu;Kim, Tae-Wan;Kang, Dou-Yol
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.10a
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    • pp.15-20
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    • 2000
  • In this paper. Thermally Stimulated Current spectra have been measured in the Polypy - romellitimide (polyimide). As a result of the investigation. three peaks have been observed: $A(50^{\circ}C)$, $B(120^{\circ}C)$, $C(200^{\circ}C)$. Among three peaks, C peak has been observed in detail. The C peak is shown to be created due to the polarization of ionic space charge from the experimental results which were measured as a function of forming time, forming temperature. forming voltage and collecting voltage. As a result, we have measured the TSC in ion ($Na^+$) implanted - Polyimide, also found the peak at $215^{\circ}C$. Therefore, TSC characteristics in the C peak is probably caused by residual impurity. And The activation energy caculated by means of initial rising method 1.8eV, hopping distance. $90{\AA}$. and the mobility. $2.88{\times}10^{-11}cm^2/v.s$

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A Estimation of Dipole Ploarization in Polypropylene Irradiated with Ultra-Violet Rays (자외선 조사된 폴리프로필렌의 쌍극자분극의 평가)

  • Kim, Sang-Keol;Jeong, Dong-Hoe;Lee, Ho-Sik;Kim, Myong-Ho;Lee, Won-Jae;Lee, Joon-Ung
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.10a
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    • pp.50-55
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    • 2000
  • In this paper, Thermally Stimulated Current(TSC) spectrum has been measured in oriented polypropylene of thickness of $40{\mu}m$ which was irradiated by Ultraviolet Ray. As a result of the investigation, four peaks have been observed-two peaks ($A_1$, $A_2$) were appeared in low temperature region($-20{\sim}20^{\circ}C$) and other two peaks ($B_1$, $B_2$) in high temperature region($80{\sim}120^{\circ}C$). Among four peaks $A_1$ and $A_2$ have bee observed in detail. These peaks are shown to be created due to the polarization of diploes from the experimental results which were measured as a function forming voltage, forming time, collecting voltage and heating rate. As the increase of irradiated-time by Ultraviolet ray, the number of dipoles was increased.

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Degradation Mechanism of the ZnO-Varistor Fabricated with the content of a 3-Composition Seed grain (3-성분 종입자법으로 제조된 ZnO-Varistor의 열화기구)

  • 장경욱;박춘배;이준웅
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1992.05a
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    • pp.97-100
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    • 1992
  • The Degradation mechanism of the ZnO-varistor fabricated with the content of a 3-Composition seed grain is discussed using the method of Thermally Stimulated Current (TSC). The spectra of TSC is measured in the temperature range of -130~270$^{\circ}C$ with a various forming electric fields E$\sub$f/, temperature T$\sub$f/ time tf, and a various rising rate of temperature. It is observed that there are appeared the peaks of ${\alpha}$, ${\alpha}$$_2$, ${\beta}$ and ${\gamma}$from high temperature in a TSC spectrum. It seems that ${\alpha}$$_1$ peak is due to thermal depolarization of donor ions forming the space charge in the depletion layer, and ${\alpha}$$_2$peak is due to the detrapping of trapped electrons in deep trap level of intergranular layer, and ${\beta}$ peak is due to the thermal exciting of carrier existing in the donor level of grain itself, and ${\gamma}$ peak is due to the thermal exciting of trapped carrier in all shallow trap site randomly distributed in the inner of sample and/or a intrinsic impurity existing in it.

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Behavior of Charged Particles do $(Sr_{0.85}{\cdot}Ca_{0.15})_mTiO_3$ Grain Boundary Layer Ceramics ($(Sr_{0.85}{\cdot}Ca_{0.15})_mTiO_3$ 입계층 세라믹의 하전입자 거동)

  • 김진사;정동효;김상남;박재세;최운식;이준용
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1995.11a
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    • pp.209-212
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    • 1995
  • In this paper, the $(Sr_{0.85}{\cdot}Ca_{0.15})TiO_3$ of paraelectric grain boundary layer (GBL) ceramics were fabricated. The characteristics of electrical conduction and the thermally stimulated current(TSC) were measured respectively. The region I below 200[V/cm] shows the ohmic conduction, the region II between 200[V/cm] and 1000[V/cm] can be explained by the Pool-Frenkel emission theory, and the region III above 2000[V/cm] is dominated by the tunneling effect. As a result, The origins of these peaks are that the ${\alpha}$ peak observed at $-20[^{\circ}C]$ looks like to be ascribed to the ionization excitation from donor level in the grain, and the ${\alpha}^{\prime}$ peak observed at $-20[^{\circ}C]$ appears to show up by detrap of the trapped carrier of border between the oxidation layer and the grain, and the ${\beta}$ peak observed at $80[^{\circ}C]$ seems to be resulted from hopping conduction of existing carrier in the trap site of the border between the oxidation and second phase.

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The Electrical Conduction and Optical Properties of ${Ta_2}{O_5}$ Thin Films by Sol-Gel Method (Sol-Gel법에 의한 ${Ta_2}{O_5}$ 박막의 전기전도와 광학적 특성)

  • 유영각
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.13 no.7
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    • pp.575-582
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    • 2000
  • The Electrical conduction and optical properties of Ta$_{2}$/O$_{5}$ thin films as the insulators in DRAM capacitors were studied. Liquid Ta/sib 2//O sub 5/ were prepared by a sol-gel processing and multiple layers were applied by spin-coating up to thickness of 800$\AA$. At annealing temperature of 300~$600^{\circ}C$ the electrical conduction and specific dielectric constant were discussed the behaivor of carrier were observed by the Thermally Stimulated Current (TSC) at the temperature range of 30~23$0^{\circ}C$. At annealing temperature of 300~$600^{\circ}C$ the samples were found to be amorphous below $600^{\circ}C$ and crystalline over it. The electrical strength was about 2.2 MV/cm at 40$0^{\circ}C$. In spite of noncrystallization over 50$0^{\circ}C$ the increasing of leakage current due to pinholes and increasing creak. The refractive index was obtained maximum (2.2) at 40$0^{\circ}C$. The dielectric constant was obtained maximum(18.6) at 40$0^{\circ}C$. TSC was observed one peak at the temperature range of 30~23$0^{\circ}C$ from sample at 40$0^{\circ}C$. In the case of collecting voltage the peak size is decreased in proportion to collecting voltage and then the peak may be thought carrier to be a ionic space charge.e.

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Recrystallized poly-Si TFTs on metal substrate (금속기판에서 재결정화된 규소 박막 트랜지스터)

  • 이준신
    • Electrical & Electronic Materials
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    • v.9 no.1
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    • pp.30-37
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    • 1996
  • Previously, crystallization of a-Si:H films on glass substrates were limited to anneal temperature below 600.deg. C, over 10 hours to avoid glass shrinkage. Our study indicates that the crystallization is strongly influenced by anneal temperature and weakly affected by anneal duration time. Because of the high temperature process and nonconducting substrate requirements for poly-Si TFTs, the employed substrates were limited to quartz, sapphire, and oxidized Si wafer. We report on poly-Si TFT's using high temperature anneal on a Si:H/Mo structures. The metal Mo substrate was stable enough to allow 1000.deg. C anneal. A novel TFT fabrication was achieved by using part of the Mo substrate as drain and source ohmic contact electrode. The as-grown a-Si:H TFT was compared to anneal treated poly-Si TFT'S. Defect induced trap states of TFT's were examined using the thermally stimulated current (TSC) method. In some case, the poly-Si grain boundaries were passivated by hydrogen. A-SI:H and poly-Si TFT characteristics were investigated using an inverted staggered type TFT. The poly -Si films were achieved by various anneal techniques; isothermal, RTA, and excimer laser anneal. The TFT on as grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. Some films were annealed at temperatures from 200 to >$1000^{\circ}C$ The TFT on poly-Si showed an improved $I_on$$I_off$ ratio of $10_6$, reduced gate threshold voltage, and increased field effect mobility by three orders. Inverter operation was examined to verify logic circuit application using the poly Si TFTs.

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