• Title/Summary/Keyword: Test vectors

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Testability of Current Testing for Open Faults Undetected by Functional Testing in TTL Combinational Circuits

  • Tsukimoto, Isao;Hashizume, Masaki;Mushiaki, Yukiko;Yotsuyanagi, Hiroyuki;Tamesada, Takeomi
    • Proceedings of the IEEK Conference
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    • 2002.07c
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    • pp.1972-1975
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    • 2002
  • A new test approach based on a supply current test method is proposed for testing open faults in bipolar logic circuits. In the approach, only the open faults are detected by the supply current test method, which are difficult to be detected by functional test methods. The effectiveness of the approach is examined experimentally on open fault detection in TTL combinational circuits. The results shows that higher fault coverage can be established by applying a small number of test input vectors of the supply current test method after test vectors of functional test methods based on stuck-at models.

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Low power scan testing and efficient test data compression for System-On-a-Chip

  • Jung, Jun-Mo;Chong, Jong-Wha
    • Proceedings of the IEEK Conference
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    • 2002.07a
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    • pp.228-230
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    • 2002
  • We present a new low power scan testing and test data compression method for System-On-a-Chip (SOC). The don't cares in unspecified scan vectors are mapped to binary values for low power and encoded by adaptive encoding method for higher compression. Also, the scan-in direction of scan vectors is determined for low power. Experimental results for full-scanned versions of ISCAS 89 benchmark circuits show that the proposed method has both low power and higher compression.

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Likelihood Ratio Test for the Equality of Two Order Restricted Normal Mean Vectors

  • Jeon Hyojin;Choi Sungsub
    • Proceedings of the Korean Statistical Society Conference
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    • 2000.11a
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    • pp.159-164
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    • 2000
  • In the study of the isotonic regression problem, several procedures for testing the homogeneity of a normal mean vector versus order restricted alternatives have been proposed since Barlow's trial(1972). In this paper, we consider the problem of testing the equality of two order restricted normal mean vectors based on the likelihood ratio principle.

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Positive rates for Enterobius vermicularis eggs among preschool children in Yeosu-si, Jeollanam-do, Korea (2017-2021)

  • Myoung-Ro Lee;Hee-Eun Shin;Seon-Ok Back;Young-Ju Lee;Jung-Won Ju;Chun Soon Park;Hee-Il Lee
    • Parasites, Hosts and Diseases
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    • v.61 no.1
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    • pp.84-88
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    • 2023
  • This study aimed to evaluate the positive rates for Enterobius vermicularis eggs among preschool children in Yeosu-si, Jeollanam-do, the Republic of Korea (Korea) over a period of 5 years (2017-2021). Perianal swab samples, obtained using cellotape, from 10,392 preschool children in 26 districts were examined microscopically for E. vermicularis eggs. The test results were notified through the local health center, and the families of children who tested positive were advised to provide them anthelmintics treatment. The annual positive rates were 5.0%, 5.2%, 4.4%, 2.2%, and 1.0% in 2017, 2018, 2019, 2020, and 2021, respectively. The overall positive rate was higher in boys than in girls (P< 0.05), and children aged 5-7 years were at a higher risk of being infected than those aged 0-4 years (P< 0.05). Although the rates of infection by E. vermicularis in the survey area, Yeosu-si, were still in the 1% range , the results of this study suggest that they can be significantly reduced through continuous intervention centered around the test-treatment strategy.

Low Power Testing in NoC(Network-on-Chip) using test pattern reconfiguration (테스트 패턴 재구성을 이용한 NoC(Network-on-Chip)의 저전력 테스트)

  • Jung, Jun-Mo
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.8 no.2
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    • pp.201-206
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    • 2007
  • In this paper, we propose the efficient low power test methodology of NoC(Network-on chip) for the test of core-based systems that use this platform. To reduce the power consumption of transferring data through router channel, the scan vectors are partitioned into flits by channel width. The don't cares in unspecified scan vectors are mapped to binary values to minimize the switching rate between flits. Experimental results for full-scanned versions of ISCAS 89 benchmark circuits show that the proposed method leads to about 35% reduction in test power.

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Comparison of Ensemble Perturbations using Lorenz-95 Model: Bred vectors, Orthogonal Bred vectors and Ensemble Transform Kalman Filter(ETKF) (로렌쯔-95 모델을 이용한 앙상블 섭동 비교: 브레드벡터, 직교 브레드벡터와 앙상블 칼만 필터)

  • Chung, Kwan-Young;Barker, Dale;Moon, Sun-Ok;Jeon, Eun-Hee;Lee, Hee-Sang
    • Atmosphere
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    • v.17 no.3
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    • pp.217-230
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    • 2007
  • Using the Lorenz-95 simple model, which can simulate many atmospheric characteristics, we compare the performance of ensemble strategies such as bred vectors, the bred vectors rotated (to be orthogonal to each bred member), and the Ensemble Transform Kalman Filter (ETKF). The performance metrics used are the RMSE of ensemble means, the ratio of RMS error of ensemble mean to the spread of ensemble, rank histograms to see if the ensemble member can well represent the true probability density function (pdf), and the distribution of eigen-values of the forecast ensemble, which can provide useful information on the independence of each member. In the meantime, the orthogonal bred vectors can achieve the considerable progress comparing the bred vectors in all aspects of RMSE, spread, and independence of members. When we rotate the bred vectors for orthogonalization, the improvement rate for the spread of ensemble is almost as double as that for RMS error of ensemble mean compared to the non-rotated bred vectors on a simple model. It appears that the result is consistent with the tentative test on the operational model in KMA. In conclusion, ETKF is superior to the other two methods in all terms of the assesment ways we used when it comes to ensemble prediction. But we cannot decide which perturbation strategy is better in aspect of the structure of the background error covariance. It appears that further studies on the best perturbation way for hybrid variational data assimilation to consider an error-of-the-day(EOTD) should be needed.

Implementation of IDDQ Test Pattern Generator for Bridging Faults (합선 고장을 위한 IDDQ 테스트 패턴 발생기의 구현)

  • 김대익;전병실
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.12A
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    • pp.2008-2014
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    • 1999
  • IDDQ testing is an effective testing method to detect various physical defects occurred in CMOS circuits. In this paper, we consider intra-gate shorts within circuit under test and implement IDDQ test pattern generator to find test patterns which detect considered defects. In order to generate test patterns, gate test vectors which detect all intra-gate shorts have to be found by type of gates. Random test sets of 10,000 patterns are applied to circuit under test. If an applied pattern generates a required test vector of any gate, the pattern is saved as an available test pattern. When applied patterns generate all test vectors of all gats or 10,000 patterns are applied to circuit under test, procedure of test pattern generation is terminated. Experimental results for ISCAS'85 bench mark circuits show that its efficiency is more enhanced than that obtained by previously proposed methods.

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Breakdown Points of Direction Tests

  • Park, Kyung-Mee
    • Journal of the Korean Statistical Society
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    • v.26 no.2
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    • pp.211-222
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    • 1997
  • We briefly review three Raleigh type location tests based on direction vectors, which have been shown to be efficient when the distribution is unknown, skewed, or heavy-tailed. Then we calculate their test breakdown points and discuss the robustness of Randles multivariate sign test for one-sample.

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Multiple Fault Detection in Combinational Logic Networks (조합논리회로의 다중결함검출)

  • 고경식;김흥수
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.12 no.4
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    • pp.21-27
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    • 1975
  • In this paper, a procedure for deriving of multiple fault detection test sets is presented for fan-out reconvergent combinational logic networks. A fan-out network is decomposed into a set of fan-out free subnetworks by breaking the internal fan-out points, and the minimal detecting test sets for each subnetwork are found separately. And then, the compatible tests amonng each test set are combined maximally into composite tests to generate primary input binary vectors. The technique for generating minimal test experiments which cover all the possible faults is illustrated in detail by examples.

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Learning Networks for Learning the Pattern Vectors causing Classification Error (분류오차유발 패턴벡터 학습을 위한 학습네트워크)

  • Lee Yong-Gu;Choi Woo-Seung
    • Journal of the Korea Society of Computer and Information
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    • v.10 no.5 s.37
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    • pp.77-86
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    • 2005
  • In this paper, we designed a learning algorithm of LVQ that extracts classification errors and learns ones and improves classification performance. The proposed LVQ learning algorithm is the learning Networks which is use SOM to learn initial reference vectors and out-star learning algorithm to determine the class of the output neurons of LVQ. To extract pattern vectors which cause classification errors, we proposed the error-cause condition, which uses that condition and constructed the pattern vector space which consists of the input pattern vectors that cause the classification errors and learned these pattern vectors , and improved performance of the pattern classification. To prove the performance of the proposed learning algorithm, the simulation is performed by using training vectors and test vectors that are Fisher' Iris data and EMG data, and classification performance of the proposed learning method is compared with ones of the conventional LVQ, and it was a confirmation that the proposed learning method is more successful classification than the conventional classification.

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