• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.204-207
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• 2000

Verification is one of the most critical and time-consuming tasks in today's design process. This paper describes the basic idea of Co-verification and the environment setup for the design of DVD Servo with TeakLite DSP core by using Seamless CVE, Hardware/software Co-verification too1.

• Proceedings of the Acoustical Society of Korea Conference
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• autumn
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• pp.249-252
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• 2004

본 논문에서는 TeakLite DSP 프로세서를 이용하여 캠코더에서 레코딩을 할 때 모터 소음과 주변 잡음이 입력되어 오디오 신호의 명료도가 떨어지는 문제점을 해결하기 위한 잡음 제거 기법의 실시간 구현에 대해서 기술하고자 한다. 잡음 제거를 위해서는 일반적으로 많이 사용되고 있는 Spectral Subtraction 기법을 사용하였다. 알고리즘 구현시 MIPS 감소에 효과적이었던 최적화 기법들을 적용하여 TeakLite DSP 프로세서에서 최적화되어 동작하도록 하였다. 최적화된 Spectral Subtraction 어셈블리 코드는 TeakLite DSP 프로세서에서 32 kHz, 16 bit 입력에 대해 40 MIPS에서 동작하였다.

• Proceedings of the Acoustical Society of Korea Conference
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• autumn
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• pp.13-16
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• 2001

본 논문에서는 3GPP 규격에 따른 IMT-2000 시스템용 UE AMR 코덱의 소프트웨어 및 하드웨어 개발에 관하여 논한다 UE AMR 코덱은 ASIC 개발을 고려하여 Teak-Lite DSP 칩을 사용하여 개발하였다 AMR 코덱을 구현하기 위한 효율적인 소프트웨어 개발 기법을 설명하고 하드웨어 디자인도 논한다 개발된 UE AMR 코덱에는 음성 데이터 입출력 기능은 물론 리부 호스트 프로세서와의 통신 기능도 포함된다. Teak-Lite EVM보드를 사용하여 실시간으로 동작하는 AMR 코덱 소프트웨어를 개발하였다. 또한 동시에 UE AMR 코덱용 하드웨어도 개발하였다. ETRI에서 개발 및 시험 중인 IMT-2000 시스템 상에서 개발한 UE AMR 코덱의 동작 및 기능을 검증하였다.

• The Journal of the Acoustical Society of Korea
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• v.23 no.3
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• pp.262-267
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• 2004

AMR-WB (Adaptive Multi Rate Wideband) speech codec, the most recent voice codec standardized by 3GPP, has the wider audio bandwidth of 50∼7000 Hz and operates on nine speech coding bit rates between 6.60 and 23.85 kbit/s. This Paper presents the real-time implementation of AMR-WB speech codec by using a 16 bit fixed-point TeakLite DSP. The implemented AMR-WB codec requires the complexity of 52.2 MIPS at 23.85 kbit/s mode and also needs the program memory of 17.9 kwords, data RAM of 11.8 kwords, and data ROM of 10.1kwords. It was verified through passing the all test vectors provided by 3GPP with maintaining bit exactness. Stable operations on the real-time testing board were also proved without any distortions and delays for the audio in/out.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.6
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• pp.69-77
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• 2002

In this paper, we present the CDMA2000 1x compliant mobile station modem chip (SCom5010) implemented in a 0.18${\mu}{\textrm}{m}$ CMOS technology.[1] ARM940T cached processor. TeakLite DSP core, and other peripheral blocks are integrated with the baseband modem chip. Also we show novel verification methodologies and explain how this chip can be used as an emulation processor.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.39 no.2
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• pp.128-136
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• 2002

In this paper, we developed an acoustic echo canceller in real-time using TeakLite DSP Core, which will be placed in the vocoder chip of a mobile handset. Considering the limited computational capacity given to the acoustic echo canceller in a vocoder chip, we employed a FIR-type adaptive filter using a conventional NLMS algorithm. To begin with, we designed and implemented an acoustic echo canceller with floating-point format C-source code, and then converted it into fixed-point format through integer simulation. Then we programmed and optimized it in the assembler level to make it run ill real-time. After optimization procedure, the implemented echo canceller has approximately 624 words of program memory and 811 words of data memory. With 8 KHz sampling rate and 256 filter taps in the echo canceller that corresponds to 32 msec of echo delay, it requires 14.12 MIPS of computational capacity. For coverage of 16 msec echo delay, i.e., 128 filter taps, 9 MIPS is requited.

• The Journal of the Acoustical Society of Korea
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• v.22 no.2
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• pp.129-134
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• 2003

In this paper, we efficiently implement the AMR speech coder by reducing the complexity of algebraic codebook search. To reduce the computational complexity of the algebraic codebook search, we propose a fast algebraic codebook search method that improves conventional depth first tree search method used in AMR speech coder algorithm. The proposed method reduces the search complexity by pruning the trees which are less possible to be selected as an optimum excitation. This method needs no additional computation for selecting the trees to be pruned and reduces the computational complexity considerably compared to the original depth first tree search method with slightly degradation or speech qualify. Applying our method to the implementation or AMR speech coder with 12.2 kbps mode by using the TeakLite DSP, we reduce the search complexity about 40% compared to the conventional method.

• The Journal of the Acoustical Society of Korea
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• v.20 no.1
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• pp.56-61
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• 2001

This paper presents the real-time implementation of an AMR (Adaptive Multi Rate) vocoder which is included in the asynchronous International Mobile Telecommunication (IMT)-2000 mobile ASIC. The implemented AMR vocoder is a multi-rate coder with 8 modes operating at bit rates from 12.2kbps down to 4.75kbps. Not only the encoder and the decoder as basic functions of the vocoder are implemented, but VAD (Voice Activity Detection), SCR (Source Controlled Rate) operation and frame structuring blocks for the system interface are also implemented in this vocoder. The DSP for AMR vocoder implementation is a 16bit fixed-point DSP which is based on the TeakLite core and consists of memory block, serial interface block, register files for the parallel interface with CPU, and interrupt control logic. Through the implementation, we reduce the maximum operating complexity to 24MIPS by efficiently managing the memory structure. The AMR vocoder is verified throughout all the test vectors provided by 3GPP, and stable operation in the real-time testing board is also proved.