• Title/Summary/Keyword: Task Scheduling

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A Deadline_driven CPU Power Consumption Management Scheme of the TMO-eCos Real-Time Embedded OS (실시간 임베디드 운영체제 TMO-eCos의 데드라인 기반 CPU 소비 전력 관리)

  • Park, Jeong-Hwa;Kim, Jung-Guk
    • Journal of KIISE:Computing Practices and Letters
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    • v.15 no.4
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    • pp.304-308
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    • 2009
  • This paper presents the deadline driven CPU-Power management scheme for the Real-Time Embedded OS: named TMO-eCos. It used the scheduling scenarios generated by a task serialization technique for hard real- time TMO system. The serializer does a off-line analysis at design time with period, deadline and WCET of periodic tasks. Finally, TMO-eCos kernel controls the CPU speed to save the power consumption under the condition that periodic tasks do not violate deadlines. As a result, the system shows a reasonable amount of power saving. This paper presents all of these processes and test results.

A Tool for Visualizing Task Scheduling of Multi-Core Embedded Systems (멀티코어 임베디드 시스템 스케줄링 결과 시각화 도구)

  • Ma, Yuseung;Woo, Duk-Kyun;Kim, Sang Cheol;Song, Junkeun;Lee, Jung-Woo;Mah, Pyeongsoo;Kim, Seon-Tae
    • Proceedings of the Korea Information Processing Society Conference
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    • 2015.10a
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    • pp.208-210
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    • 2015
  • 임베디드 시스템에서 멀티코어 프로세스의 채택이 늘어나고 있다. 멀티코어 시스템이 태스크들을 효율적으로 병렬화하여 성능을 극대화하였는지 살펴보기 위해서는 태스크들의 스케줄링 결과를 분석하고 시각화 해주는 도구가 필요하다. 본 논문에서는 멀티코어 임베디드 시스템을 위한 태스크 스케줄링 결과 시각화 도구를 소개한다. 자원 제약이 있는 임베디드 타켓 디바이스의 부하를 줄이기 위해 스케줄링 결과는 호스트 컴퓨터에 전달되어 분석 및 시각화된다. 시각화 형태는 시스템의 전체 동작을 한 눈에 파악할 수 있게 해주는 그래프 형태와 정밀한 분석을 가능하게 해 주는 리스트 형태로 제공된다. 제시된 도구는 멀티코어 임베디드 시스템의 태스크들의 스케줄링 결과를 쉽고 정확하게 파악할 수 있게 해 주어 시스템의 성능 향상에 도움을 준다.

A Performance Analysis on Task Scheduling Mechanisms Using CPU Pinning in OpenMP Based on Xen Virtualization (Xen 가상화 기반 OpenMP 환경에서 물리 CPU 지정에 따른 태스크 스케줄링 기법들의 성능 분석)

  • Song, ChungGeon;Myung, Rohyoung;Choi, HeeSeok;Yu, HeonChang;Lee, EunYoung
    • Proceedings of the Korea Information Processing Society Conference
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    • 2015.10a
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    • pp.223-226
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    • 2015
  • 최근 클라우드를 지원하는 Xen 가상화 환경에서 HPC를 구현하는 서비스의 수가 증가하고 있다. 따라서 SMP기반의 병렬컴퓨팅 구현을 위한 표준 라이브러리인 OpenMP 연산효율의 중요성이 높아지고 있다. 본 논문에서는 Xen 가상화 기반 OpenMP 환경에서 CPU Pinning 적용 여부에 따라 다양한 태스크 스케줄링의 성능 변화를 측정하기 위한 실험을 수행하였다. 실험결과, CPU Pinning을 적용했을 시정적 스케줄링은 3.7%, 동적 스케줄링은 3.4%, 태스크 지시자 스케줄링은 3.8%의 성능 향상을 보였다. 이러한 결과는 Xen 가상화 환경에서 효율적인 병렬 컴퓨팅 기법 설계를 위한 방향을 제시한다.

Load Balancing Approach to Enhance the Performance in Cloud Computing

  • Rassan, Iehab AL;Alarif, Noof
    • International Journal of Computer Science & Network Security
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    • v.21 no.2
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    • pp.158-170
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    • 2021
  • Virtualization technologies are being adopted and broadly utilized in many fields and at different levels. In cloud computing, achieving load balancing across large distributed virtual machines is considered a complex optimization problem with an essential importance in cloud computing systems and data centers as the overloading or underloading of tasks on VMs may cause multiple issues in the cloud system like longer execution time, machine failure, high power consumption, etc. Therefore, load balancing mechanism is an important aspect in cloud computing that assist in overcoming different performance issues. In this research, we propose a new approach that combines the advantages of different task allocation algorithms like Round robin algorithm, and Random allocation with different threshold techniques like the VM utilization and the number of allocation counts using least connection mechanism. We performed extensive simulations and experiments that augment different scheduling policies to overcome the resource utilization problem without compromising other performance measures like makespan and execution time of the tasks. The proposed system provided better results compared to the original round robin as it takes into consideration the dynamic state of the system.

Resource and Sequence Optimization Using Constraint Programming in Construction Projects

  • Kim, Junyoung;Park, Moonseo;Ahn, Changbum;Jung, Minhyuk;Joo, Seonu;Yoon, Inseok
    • International conference on construction engineering and project management
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    • 2022.06a
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    • pp.608-615
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    • 2022
  • Construction projects are large-scale projects that require extensive construction costs and resources. Especially, scheduling is considered as one of the essential issues for project success. However, the schedule and resource management are challenging to conduct in high-tech construction projects including complex design of MEP and architectural finishing which has to be constructed within a limited workspace and duration. In order to deal with such a problem, this study suggests resource and sequence optimization using constraint programming in construction projects. The optimization model consists of two modules. The first module is the data structure of the schedule model, which consists of parameters for optimization such as labor, task, workspace, and the work interference rate. The second module is the optimization module, which is for optimizing resources and sequences based on Constraint Programming (CP) methodology. For model validation, actual data of plumbing works were collected from a construction project using a five-minute rate (FMR) method. By comparing actual data and optimized results, this study shows the possibility of reducing the duration of plumbing works in construction projects. This study shows decreased overall project duration by eliminating work interference by optimizing resources and sequences within limited workspaces.

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Analysis of partial offloading effects according to network load (네트워크 부하에 따른 부분 오프로딩 효과 분석)

  • Baik, Jae-Seok;Nam, Kwang-Woo;Jang, Min-Seok;Lee, Yon-Sik
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2022.10a
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    • pp.591-593
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    • 2022
  • This paper proposes a partial offloading system for minimizing application service processing latency in an FEC (Fog/Edge Computing) environment, and it analyzes the offloading effect of the proposed system against local-only and edge-server-only processing based on network load. A partial offloading algorithm based on reconstruction linearization of multi-branch structures is included in the proposed system, as is an optimal collaboration algorithm between mobile devices and edge servers [1,2]. The experiment was conducted by applying layer scheduling to a logical CNN model with a DAG topology. When compared to local or edge-only executions, experimental results show that the proposed system always provides efficient task processing strategies and processing latency.

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A Mixed Integer Nonlinear Programming Approach towards Optimal Earthmoving Equipment Selection (혼합 정수 비선형 계획법 기반 토공사 최적 장비 선정 방법 제시)

  • Ko, Yong-Ho;Ngov, Kheang;Lee, Su-Min;Shin, Do-Hyoung;Han, Seung-Woo
    • Proceedings of the Korean Institute of Building Construction Conference
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    • 2023.05a
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    • pp.223-224
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    • 2023
  • Optimal fleet management in the planning stage is one of the most critical activities that guarantee successful construction projects. In South Korea, the construction standard production rate database (CSPRD) is normally employed. However, when it comes to a trade-off problem that involves decision-making on optimal sets of equipment to perform a certain task, the method will require the planners' in-depth knowledge and experience regarding the target process and a time consuming estimation of the performance of every possible scenario must be conducted for the deduction of the optimal fleet management. On this account, this research paper proposes a lightweight method of using mixed integer nonlinear programming (MINLP) in multi-objective problems based on CSPRD-based mathematical equations to assist planners in the preplanning stage of choosing the optimal sets of types and size machinery to efficiently arrange the construction scheduling and budgeting.

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Efficient Execution Method for Business Process Management using TOC Concepts (제약이론을 활용한 업무프로세스의 효율적 실행 방법)

  • Rhee Seung-Hyun;Bae Hyerim;Won Hyungjun;Kim Hoontae;Kang Suk-Ho
    • The Journal of Society for e-Business Studies
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    • v.10 no.1
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    • pp.61-80
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    • 2005
  • Business Process Management (BPM) System is a software system to support an efficient execution, control and management of business processes. The system automates complex business processes and manages them effectively to raise productivity. Traditional commercial systems mainly focus on automating processes and do not have methods for enhancing process performances and task performer's efficiency. Therefore, there is room for enhancement of task performers' productivities and efficiency of business processes. In this paper, we propose a new method of executing business processes more efficiently in that a whole process is scheduled considering the degree of participants' workload. The method allows managing the largest constraints among constituent resources of the process. This method is based on the DBR (Drum-Buffer-Rope) in TOC (Theory of Constraints) concepts. We first consider the differences between business process models and DBR application models, and then develop the modified drum, buffer and rope. This leads us to develop BP-DBR (Business Process-DBR) that can control the proper size of task performers' work list and arrival rate of process instances. Use of BP-DBR improves the efficiency of the whole process as well as participants' working condition. We then carry out a set of simulation experiments and compare the effectiveness of our approach with that of the scheduling techniques used in existing systems.

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Hardware-Software Cosynthesis of Multitask Multicore SoC with Real-Time Constraints (실시간 제약조건을 갖는 다중태스크 다중코어 SoC의 하드웨어-소프트웨어 통합합성)

  • Lee Choon-Seung;Ha Soon-Hoi
    • Journal of KIISE:Computer Systems and Theory
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    • v.33 no.9
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    • pp.592-607
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    • 2006
  • This paper proposes a technique to select processors and hardware IPs and to map the tasks into the selected processing elements, aming to achieve high performance with minimal system cost when multitask applications with real-time constraints are run on a multicore SoC. Such technique is called to 'Hardware-Software Cosynthesis Technique'. A cosynthesis technique was already presented in our early work [1] where we divide the complex cosynthesis problem into three subproblems and conquer each subproblem separately: selection of appropriate processing components, mapping and scheduling of function blocks to the selected processing component, and schedulability analysis. Despite good features, our previous technique has a serious limitation that a task monopolizes the entire system resource to get the minimum schedule length. But in general we may obtain higher performance in multitask multicore system if independent multiple tasks are running concurrently on different processor cores. In this paper, we present two mapping techniques, task mapping avoidance technique(TMA) and task mapping pinning technique(TMP), which are applicable for general cases with diverse operating policies in a multicore environment. We could obtain significant performance improvement for a multimedia real-time application, multi-channel Digital Video Recorder system and for randomly generated multitask graphs obtained from the related works.

Performance Reengineering of Embedded Real-Time Systems (내장형 실시간 시스템의 성능 개선을 위한 리엔지니어링 기법)

  • 홍성수
    • Journal of KIISE:Computer Systems and Theory
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    • v.30 no.5_6
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    • pp.299-306
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    • 2003
  • This paper formulates a problem of embedded real-time system re-engineering, and presents its solution approach. Embedded system re-engineering is defined as a development task of meeting performance requirements newly imposed on a system after its hardware and software have been fully implemented. The performance requirements nay include a real-time throughput and an input-to-output latency. The proposed solution approach is based on a bottleneck analysis and nonlinear optimization. The inputs to the approach include a system design specified with a process network and a set of task graphs, task allocation and scheduling, and a new real-time throughput requirement specified as a system's period constraint. The solution approach works in two steps. In the first step, it determines bottleneck precesses in the process network via estimation of process latencies. In the second step, it derives a system of constraints with performance scaling factors of processing elements being variables. It then solves the constraints for the performance staling factors with an objective of minimizing the total hardware cost of the resultant system. These scaling factors suggest the minimal cost hardware upgrade to meet the new performance requirement. Since this approach does not modify carefully designed software structures, it helps reduce the re-engineering cycle.