• Proceedings of the IEEK Conference
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• 2000.06e
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• pp.155-158
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• 2000

In this paper, For operator's conveniency of the mobile robot, achieved the system which control the robot by adopting the speaker independently isolated word recognition and by implementing the real time with TMS320C31. and This paper using the Tri-ultrasonics range finder to detect obstacles and implements the mobile robot. In this paper, DSP processor (TMS320C31) is used signal processing for speech recognition in the real time and Micro processor(80C196KC) is controling the ultrasonics range finders.

• Proceedings of the IEEK Conference
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• 2003.07e
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• pp.2212-2215
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• 2003

In this paper, we proposed speech feature vector extractor for embedded system using TMS 320C31 DSP chip. For this extractor, we used algorithm using cepstrum coefficient based on LPC(Linear Predictive Coding) that is reliable algorithm to be is widely used for speech recognition. This system extract the speech feature vector in real time, so is used the mobile system, such as cellular phones, PDA, electronic note, and so on, implemented speech recognition.

• Journal of Institute of Control, Robotics and Systems
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• v.1 no.1
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• pp.50-57
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• 1995

In this paper, the design and the implementation of the controller for an articulate robot, which is developed in our Automatic Control Laboratory, are mainly discussed. The controller reduces software computational load via distributed processing method using multiple CPU's, and simplifies structures by the time-division control with TMS320C31 DSP chip. The method of control is based on the fuzzy-compensated PID control with scale factor, which compensates for the influence of load variation resulting from the various postures of the robot with conventional PID scheme. The application of the proposed controller to the robot system with DC servo-motors shows some excellent control capabilities. Also, the response characteristics of system for the various trajectory commands verify the superiority of the controller.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.11
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• pp.31-38
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• 1998

This paper deals with CBS(Cycle Base Simulator) design of a 32 bit floating point DSP(Digital Signal Processor). The CBS has been developed for TMS320C30 compatible DSP and will be used to confirm the architecture, functions of sub-blocks, and control signals of the chip before the detailed logic design starts with VHDL. The outputs from CBS are used as important references at gate level design step because they give us control signals, output values of important blocks, values from internal buses and registers at each pipeline step, which are not available from the commercial simulator of DSP. In addition to core functions, it has various interfaces for efficient execution and convenient result display, CBS is verified through comparison with results from the commercial simulator for many application algorithms and its simulation speed is as fast as several tenth of that of logic simulation with VHDL. CBS in this work is for a specific DSP, but the concept may be applicable to other VLSI design.

• Journal of Broadcast Engineering
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• v.2 no.1
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• pp.8-15
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• 1997

In this paper, a real-time operating Motion Picture Experts Group-1 (MPEG-1) audio encoder system is implemented using a TMS320C31 Digital Signal Processor (DSP) chip. The basic operation of the MPEG-1 audio encoder algorithm based on audio layer-2 and psychoacoustic model-1 is first verified by C-language. It is then realized using the Texas Instruments (Tl) assembly in order to reduce the overall execution time. Finally, the actual BSP circuit board for the encoder system is designed and implemented. In the system, the side-modules such as the analog-to-digital converter (ADC) control, the input/output (I/O) control, the bit-stream transmission from the DSP board to the PC and so on, are utilized with a field programmable gate array (FPGA) using very high speed hardware description language (VHDL) codes. The complete encoder system is able to process the stereo audio signal in real-time at the sampling frequency 48 kHz, and produces the encoded bit-stream with the bit-rate 192 kbps. The real-time operation capability of the encoder system and the good quality of the decoded sound are also confirmed using various types of actual stereo audio signals.

• Journal of Institute of Control, Robotics and Systems
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• v.3 no.4
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• pp.363-372
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• 1997

In this paper, the design and the implementation of the adaptive learning rate neural network controller for an articulate robot, which is being developed (or) has been developed in our Automatic Control Laboratory, are mainly discussed. The controller reduces software computational load via distributed processing method using multiple CPU's, and simplifies hardware structures by the time-division control with TMS32OC31 DSP chip. Proposed neural network controller with adaptive learning rate structure using expert's heuristics can improve learning speed. The proposed controller verifies its superiority by comparing response characteristics of conventional controller with those of the proposed controller that are obtained from the experiments for the 5 axis vertical articulated robot. We, also, present the generalization property of proposed controller for unlearned trajectory and the change of load through experimental data.

• Proceedings of the KIEE Conference
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• 1995.07a
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• pp.340-343
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• 1995

This paper consists of the position control of induction motor using Generalized Predictive Control. Full order flux observer is also used for the purpose of estimating rotor fluxes. By using Generalized Predictive Control algorithm, the improved position control is realized in this paper. The proposed control method has been implemented by a 32 bit floating point TMS320C31 DSP chip.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.10
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• pp.21-31
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• 1994

This paper describes the multichannel combined R2MFC/DTMF/CCT reciver which provides a signaling service functions for call processing control in digital switching system. Using the TMS320C25 DSP chip, we have implemented multi-function receriver shich processes 8 channels of R2MFC, DTMF, and CCT signals simultaneously. In order to increase the channel multiplicity of the combined receiver. R2MFC and CCT receiver were employed by discrete Fourier transform(DFT) method using Goertzel algorithm, and DTMFreceiver was employ by infinite impulse reponse(IIR) filtering method using 4KHz subsampling technique. The combined receiver has 4 function modes for each channel such as R2MFC, DTMF, CCT, and Idle modes. The function mode of each channel may be selected at any time by single-chip micro-controller(.mu.C). Hence, the number of channels assigned for each function mode can be adjusted dynamically according to the signaling traffic variations. From the experimental test results using the test-bed, it has been proved that the combined receiver statisfies all receiver satisfies all receiver specifications, and provides good channel multiplicity and performance, Therefore, it may give a great improvement than existing receiver in cost, reliability, availability, and serviceability.

• Proceedings of the KIEE Conference
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• 1993.07a
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• pp.268-270
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• 1993

The implementation of Nonlinear Feedback Linearization control for Electro-Magnetic Suspension system is presented. The controller using TMS320C31 DSP chip was proposed and the experiments were performed Control law for EMS system using feedback linearization is derived and implemented in the DSP. Some tests were constructed far experimental comparison between feedback linearization and classical state feedback The experimental results demonstrate that the feedback linearization controller shows bettor performance than that of the classical state feedback controller and it is robust with respect to disturbance and parameter variation, though some steady-state errors appear.

• Journal of Korea Society of Digital Industry and Information Management
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• v.15 no.4
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• pp.31-40
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• 2019

This paper proposes an adaptive PCIe system for TI C66x DSPs. Conventionally, the PCIe system provided by the C66x is a system dependent on the structure in which the primary core writes an application to the DSP memory through the PCIe interface, then activate the secondary core. Due to the dependency between the cores, when developing a project using a PCIe interface, the remaining cores have to be programmed with a concern of the primary core used as the PCIe interface. Therefore, in order to de-couple the connections among the cores, an adaptive PCIe system is proposed, in the paper, in which the cores operate independently compared to the conventional system. Since the core used as the PCIe interface only runs PCIe related operations in the new system, the remaining cores can be fully utilized without concerning the connections with the core for PCIe interface. In order to verify the feasibility of the proposed adaptive PCIe system, the implementations of LTE-A down link, and IEEE 802.11ac are carried out using the evaluation board which includes a TMS320C6670 chip. Altogether, these results support that we demonstrated that the digital signal processing systems with the PCIe Interface can be developed more rapidly by applying the proposed system.