• Journal of KIISE:Computer Systems and Theory
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• v.32 no.6
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• pp.296-305
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• 2005

TCP/IP, the most popular communication protocol, is processed on a host CPU in traditional computer systems and this imposes enormous loads on the host CPU. Recently TCP/IP Offload Engine (TOE) technology, which processes TCP/IP on a network adapter instead of the host CPU, becomes an important way to solve the problem. In this paper we analysed the structure of a TCP/IP protocol stack in the Linux operating system and important factors, which cause a lot of loads on the host CPU, by measuring the time spent on processing each function in the protocol stack. Based on these analyses, we propose a Hybrid TOE architecture, in which functions imposing much loads on the host CPU are implemented using hardware and other functions are implemented using software.

• 제어로봇시스템학회:학술대회논문집
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• 1997.10a
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• pp.414-417
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• 1997

Many small-sized real-time kernels do not provide memory management and device drivers, not to mention file management. In this paper, we propose a design and implementation of TCP/IP protocol stack for such small real-time kernels based on [6] where we studied issues to be considered for porting the functionalities of TCP/IP for such small real-time kernels.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.927-930
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• 2003

In this paper, a design of processor IP for TCP/IP protocol stack is described. The processor consists of input and output buffer memory with dual bank structure, 32-bit RISC microprocessor core, DMA unit with on-the-fly checksum capability. To handle the various modes of TCP/IP protocol, hardware and software co-design approach is used rather than the conventional state machine based design. To eliminate delay time due to the data transfer and checksum operation, DAM module which can execute the checksum operation on-the-fly along with data transfer operation is adopted. By programming the on-chip code ROM of RISC processor differently. the designed stack processor can support the packet format conversion operations required in the various TCP/IP protocols.

• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.212-214
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• 2004

Hardware implemented ring buffer systems and methods are presented for the effective management of the ring buffer in TCP/IP communication. The layer interface of the ring buffer systems transfer free buffer and used buffer size information to the TCP/IP stack upper or low layer. The pointer updation interface calculates a temporary pointer from the data size which is needed by the present pointer of the ring buffer and upper or lowyer layer. The pointer manager of the ring buffer systems is responsible for saving the present pointer of the ring buffer, updating the ring buffer pointer to the new pointer, calculating the free buffer size and used buffer size of the ring buffer, and transferring the information to the upper layer. The ring buffer systems help the TCP/IP layer and TCP/IP upper or lower layer to decide the sending or receiving data size effectively. The delay of transferring data can be lowered by the ring buffer system.

• Proceedings of the Korean Information Science Society Conference
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• 2002.10e
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• pp.427-429
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• 2002

내장형 시스템 및 RTOS에 대한 관심이 늘어나면서 낮은 성능의 하드웨어상에서의 네트워킹 기능이 중요한 이슈로 떠오르고 있다. 그러나 기존의 BSD기반의 TCP／IP는 많은 메모리를 필요로 하고 실제로 RTOS에서 자주 사용되지 않는 기능들도 많이 있기 때문에 기존의 TCP／IP 프로토콜 스택의 수정이 불가피하다. 본 논문에서는 낮은 성능의 하드웨어에 적합하게 TCP/IP프로토콜 스택을 경량화하고 메모리 사용에 대한 오버헤드를 줄일 수 있는 프로토콜 스택을 구현하고자 한다.

• International Journal of Control, Automation, and Systems
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• v.3 no.1
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• pp.122-129
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• 2005

We describe the MiniWeb[7] TCP/IP stack (mIP), which is an extremely small implementation of the TCP/IP protocol suite running 8 or 32-bit micro controllers intended for embedded control systems, and satisfying the subset of RFC1122 requirements needed for host­to-host interoperability over different platforms. Our TCP/IP implementation does sacrifice some of TCP's mechanisms such as fragmentation, urgent data, retransmission, or congestion control. Our implementation is applicable to web based controllers. The network protocols are tested in operational networks using CommView and Dummynet where the various operational parameters such as bandwidth, delay, and queue sizes can be set and controlled.

• Journal of KIISE:Computing Practices and Letters
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• v.10 no.3
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• pp.231-242
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• 2004

Remote control and monitoring of information appliances require RTOS and TCP/IP network module to communicate each other. Traditional TCP/IP protocol stacks, however, require relatively large resources to be useful in small 8 or 16-bit systems both in terms of code size and memory usage. It motivates design and implementation of micro TCP/IP that is lightweight for embedded systems. Micro embedded web server is also required to control and monitor information appliances through the Web. In this paper, we design and implement micro TCP/IP and Web server for information appliances. For this goal, we investigate requirements for the interoperability of embedded systems with the Internet and the Web-based control of embedded systems. Next, we compare our micro TCP/IP protocol stack with that of RTIP and QPlus in terms of object code size and performance. The size of micro TCP/IP protocol stack can be reduced by 3/2 and 1/4, respectively, comparing with that of RTIP and QPlus. We also show that the performance of our micro TCP/IP is similar to that of RTIP and QPlus since it handles 2.9Mbps when delayed ACK is not adapted.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.6
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• pp.1166-1174
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• 2004

In this paper, a design of RISC-based transmission wrapper processor for TCP/IP protocol stack is described. The processor consists of input and output buffer memory with dual bank structure, 32-bit RISC microprocessor core, DMA unit with on-the-fly checksum capability, and memory module. To handle the various modes of TCP/IP protocol, hardware-software codesign approach based on RISC processor is used rather than the conventional state machine design. To eliminate large delay time due to sequential executions of data transfer and checksum operation, DMA module which can execute the checksum operation along with data transfer operation is adopted. The designed processor exclusive of variable-size input/output buffer consists of about 23,700 gates and its maximum operating frequency is about 167MHz under 0.35${\mu}m$ CMOS technology.

• The KIPS Transactions:PartA
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• v.14A no.5
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• pp.295-300
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• 2007

The Linux-based embedded systems such as mobile telephones. PDAs and MP3 players are widely in use. USB(Universal Serial Bus) is the interface for data communication between the computers and these peripheral devices. Some embedded systems like intelligent home networking and multimedia streaming require guaranteed QoS(Quality of Service), which is needed for real time transmission of UDP/IP messages through USB. Although USB Ethernet driver is supported by USB Gadget API in Linux, it is unable to provide the desirable QoS required by each type or small embedded systems due to the unpredictability or TCP/IP Stack in Linux. This paper proposes IP-Over-USB to improve QoS of UDP/IP message transmission in the embedded systems using USB in Linux system.

• The KIPS Transactions:PartA
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• v.16A no.2
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• pp.113-124
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• 2009

With increasing multicore system, much effort has been put on the performance improvement of its application. Because multicore system has multiple processing devices in one system, its processing power increases compared to the single core system. However in many cases the advantages of multicore can not be exploited fully because the existing software and hardware were designed to be suitable for single core. When the existing software runs on multicore, its performance improvement is limited by the bottleneck of sharing resources and the inefficient use of cache memory on multicore. Therefore, according as the number of core increases, it doesn't show performance improvement and shows performance drop in the worst case. In this paper we propose a method of performance improvement of multicore system by applying Flow-Level Parallelism to the existing TCP/IP network application and operating system. The proposed method sets up the execution environment so that each core unit operates independently as much as possible in network application, TCP/IP stack on operating system, device driver, and network interface. Moreover it distributes network traffics to each core unit through L2 switch. The proposed method allows to minimize the sharing of application data, data structure, socket, device driver, and network interface between each core. Also it allows to minimize the competition among cores to take resources and increase the hit ratio of cache. We implemented the proposed methods with 8 core system and performed experiment. Experimental results show that network access speed and bandwidth increase linearly according to the number of core.