• ETRI Journal
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• v.31 no.6
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• pp.732-740
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• 2009

This paper describes the implementation of a digital audio effect system-on-a-chip (SoC), which integrates an embedded digital signal processor (DSP) core, audio codec intellectual property, a number of peripheral blocks, and various audio effect algorithms. The audio effect SoC is developed using a software and hardware co-design method. In the design of the SoC, the embedded DSP and some dedicated hardware blocks are developed as a hardware design, while the audio effect algorithms are realized using a software centric method. Most of the audio effect algorithms are implemented using a C code with primitive functions that run on the embedded DSP, while the equalization effect, which requires a large amount of computation, is implemented using a dedicated hardware block with high flexibility. For the optimized implementation of audio effects, we exploit the primitive functions of the embedded DSP compiler, which is a very efficient way to reduce the code size and computation. The audio effect SoC was fabricated using a 0.18 ${\mu}m$ CMOS process and evaluated successfully on a real-time test board.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.23 no.6
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• pp.609-617
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• 2014

We have studied a chip-on-board LED lighting optical system for various luminous-intensity-distribution angles of the LED. An optical system that can accept different LEDs was made to reduce the systems's weight and size as we selected the chip-on-board LED, which is easy to apply to optical systems, unlike existing package-on-board LEDs. The luminous-intensity-distribution angles were $45^{\circ}$, $60^{\circ}$, $90^{\circ}$, and $120^{\circ}$. We researched these four types of optical systems. The $45^{\circ}$ and $60^{\circ}$ units were developed into reflectors, and the $90^{\circ}$ and $120^{\circ}$ units, into lenses. We checked the performance of the designed optical system through simulation and made a mock-up. Then we made a prototype of the chip-on-board LED high bay for use with the mock-up. After measuring its performance, we tested the luminous-intensity-distribution angles and compared them with simulation data. The resulting prototype was developed considering brightness, light uniformity, age, and economics which are suitable for a factory environment.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.11_12
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• pp.629-638
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• 2005

In the System on a Chip design, the on chip bus is one of the critical factors that decides the overall system performance. Especially, in the case or reusing the IPs such as processors, DSPs and multimedia IPs that requires higher bandwidth, the bandwidth problems of on chip bus are getting more serious. Recently ARM proposes the Multi-Layer AHB BusMatrix that is a highly efficient on chip bus to solve the bandwidth problems. The Multi-Layer AHB BusMatrix allows parallel access paths between multiple masters and slaves in a system. This is achieved by using a more complex interconnection matrix and gives the benefit of increased overall bus bandwidth, and a more flexible system architecture. However, there is one clock cycle delay for each master in existing Multi-Layer AHB BusMatrix whenever the master starts new transactions or changes the slave layers because of the Input Stage and arbitration logic realized with Moore type. In this paper, we improved the existing Multi-Layer AHB BusMatrix architecture to solve the one clock cycle delay problems and to reduce the area overhead of the Input Stage. With the elimination of the Input Stage and some restrictions on the arbitration scheme, we tan take away the one clock cycle delay and reduce the area overhead. Experimental results show that the end time of total bus transaction and the average latency time of improved Multi-Layer AHB BusMatrix are improved by $20\%\;and\;24\%$ respectively. in ease of executing a number of transactions by 4-beat incrementing burst type. Besides the total area and the clock period are reduced by $22\%\;and\;29\%$ respectively, compared with existing Multi-layer AHB BusMatrix.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2000.11a
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• pp.102-105
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• 2000

A simple digital control system has been developed for the frequency stabilization of an internal mirror He-Ne laser. The system is based on one chip microprocessor with embedded Basic interpreter. To stabilize the laser output frequency, the signal such as power difference or beat frequency between two modes is supplied and processed by a microprocessor, and control signal is fed to the heating coil would round the laser tube for adjusting the spacing of the laser cavity mirror. Newly developed frequency stabilization system is totally digitized. The system and the frequency stability performance are briefly described.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.892-895
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• 2011

Power consumption during testing System-On-Chip (SOC) are becoming increasingly important as the IP core increases in SOC. We present a new algorithm to reduce the scan-in power using the modified scan latch reordering and clock gating. We apply scan latch reordering technique for minimizing the hamming distance in scan vectors. Also, during scan latch reordering, the don't care inputs in scan vectors are assigned for low power. Also, we apply the clock gated scan cells. Experimental results for ISCAS 89 benchmark circuits show that reduced low power scan testing can be achieved in all cases.

• Journal of Institute of Control, Robotics and Systems
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• v.6 no.10
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• pp.903-910
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• 2000

In this paper, we describe a slave chip based on the Profibus-DP protocol and a system board to verify the developed slave chip. The Profibus-DP protocol is designed using VHDL and implemented on FPGA. The system board adopting the developed FPGA is designed FPGA is designed in which the firmware is implemented on Intel 8051 by using C language. Among the Profibus-DP protocols, low level layers from the physical layer to the data link layer is implemented in the form of hardware that we are able to greatly reduce the CPU load in processing protocols, and then higher layers could be processed by software. These technologies result in an IP to make terminal devices in the distributed control systems. Therefore, many digital logics as well as communication logics can be implemented onto SOC(System On a Chip) and it could be applied to various fieldbus-related areas.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.06a
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• pp.481-484
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• 2007

This paper presents a method of constructing the system-on-chip(SoC) based on embedded systems. The proposed method is more compact and effectiveness than former methods. The requirements generation start high level performance simulation and then passes to an executable specification suitable for implementation using a hardware/software co-design tool. The reuse of pre-exiting components is supported, as well as synthesis of the system interface, but only after much work is done to program the hardware/software co-design tool. The actual design flow described allows feedback among all design levels, e.g. from implementation up to requirements, throughout the process. In the future, it is necessary to development the advanced method of constructing system-on-chip based on embedded systems.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.24 no.4
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• pp.448-454
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• 2015

In this paper, the band structural design that is typically in a line was arranged in a ring shape, so as to configure the high power LED lighting in such a way as to form a concentrated light distribution angle of less than 15 degrees. The parabolic aluminized reflector PAR38 that facilitates design using area and the area of the optical system to the same extent, applied a multiple light-source condenser lens optical system for the control of integration. The LED used here implemented a single linear light source using ans LED module with ans LED, flip-chip chip-scale package. The optical system was designed based on the energy star standard.

• Proceedings of the IEEK Conference
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• 2003.07e
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• pp.2240-2243
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• 2003

In this paper. we present a new speech recognition system using DSP chip. DSP chip used TMS320c6711 of TI. We designed hardware system including acoustic model, word list and code book in flash memory. The word candidates are recognized based on CV, VCCV, and VC units HMM. This system can be applied to various electric ＆ electronic devices: home automation, robotics etc.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2000.05a
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• pp.146-149
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• 2000

In this paper, Computer Colour Matching and Kitchen System (CCMKS) is developed on the basis of delphi package and one-chip processor with fuzzy-PID control. CCMKS will be widely used in the colour dyeing industry as an integrated colour matching and dispensing system which have more advantages than the conventional matching or dispensing system, when controlling the real dyeing processes. Delphi is utilized in making database and search/matching routes. The developed matching function reduces the search and matching time to about one third. One-chip processor is designed and manufactured for the distributed control of three-phase induction motors. Fuzzy-PID control is applied to the speed control of three-phase induction motors for a very precise weight of colour at CCMKS. The developed kitchen function decreases the dispensing time to about one twentieth. The experimental results show CCMKS has more excellent search time, more precise weight and much high fidelity than conventional colour matching or dispensing system, in the performance.