• KSII Transactions on Internet and Information Systems (TIIS)
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• 제18권5호
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• pp.1412-1430
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• 2024

The soft cancellation list (SCANL) decoding algorithm for polar codes runs L soft cancellation (SCAN) decoders with different decoding factor graphs. Although it can achieve better decoding performance than SCAN algorithm, it has high latency. In this paper, a fast simplified SCANL (Fast-SSCANL) algorithm that runs L independent Fast-SSCAN decoders is proposed. In Fast-SSCANL decoder, special nodes in each factor graph is identified, and corresponding low-latency decoding approaches for each special node is propose first. Then, syndrome check aided Fast-SSCANL (SC-Fast-SSCANL) algorithm is further put forward. The ordinary nodes satisfied the syndrome check will execute hard decision directly without traversing the factor graph, thereby reducing the decoding latency further. Simulation results show that Fast-SSCANL and SC-Fast-SSCANL algorithms can achieve the same BER performance as the SCANL algorithm with lower latency. Fast-SSCANL algorithm can reduce latency by more than 83% compared with SCANL, and SC-Fast-SSCANL algorithm can reduce more than 85% latency compared with SCANL regardless of code length and code rate.

• 한국수학교육학회지시리즈E:수학교육논문집
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• 제6권
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• pp.371-381
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• 1997

Let p be an odd prime number. We introduce simple and useful decoding algorithm for orthogonal Latin square codes of order p. Let H be the parity check matrix of orthogonal Latin square code. For any x ${\in}$ GF(p)$^{n}$, we call xH$^{T}$ the syndrome of x. This method is based on the syndrome decoding for linear codes. In L$_{p}$, we need to find the first and the second coordinates of codeword in order to correct the errored received vector.

• Journal of the Korean Society for Industrial and Applied Mathematics
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• 제6권1호
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• pp.47-52
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• 2002

In this paper we propose a simple decoding algorithm for the 4-ary lexicographic codes (or lexicodes) of length 10 with minimum distance 4, write $S_{10,4}$. It is based on the syndrome decoding method. That is, using a syndrome vector we detect an error and it will be corrected an error from the four parity check equations.

• 한국통신학회논문지
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• 제22권7호
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• pp.1419-1426
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• 1997

A new SCEE(Syndrome Check Error Estimation) decoding method for convolutional code and concatenated SCEE/RS (Reed-Solomon) conding scheme are proposed. First, we describe the operation of the decoding steps in the proposed algorithm. Then deterministic values on the decoding operation are drived when some combination of predecoder-reencoder is used. Computer simulation results show that the compuatational complexity of the proposed SCEE decoder is significantly reduced compared to that of conventional Viterbi-decoder without degratation of the $P_{e}$ performance. Also, the concatenated SCEE/RS decoder has almost the same complexity of a RS decoder and its coding gain is higher than that of soft decision Viterbi or RS decoder respectively.

• 한국정보전자통신기술학회논문지
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• 제12권1호
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• pp.37-42
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• 2019

본 논문에서는 부호 길이 내에서 1개의 오류를 정정할 수 있는 해밍 부호(Hamming code)에 대해 2 개의 오류를 정정할 수 있는 신드롬 복호 기법을 제안하였다. 본 논문에서 제안한 복호 기법은 복호 복잡도를 거의 증가시키지 않으면서도 다중 오류를 정정함으로서 복호 복잡도 대비 오율 성능을 크게 개선할 수 있는 장점을 갖는다. 본 논문에서 제안한 복호 기법은 IoT 기기들 간의 통신이나 분자 통신과 같이 부/복호기에서 에너지의 사용이 극히 제한된 환경에서 부 복호기의 에너지 사용이 적으면서도 우수한 오율 성능이 요구되는 경우에 적합하다. 본 논문에서 제안한 복호 기법이 적용된 해밍 부호의 오율 성능이 개선되었음을 보이기 위해 BPSK 변조 방식과 AWGN 채널 환경에서 부호 길이가 짧은 다수의 해밍 부호에 대해 시뮬레이션을 수행하였으며, 수행 결과 해밍 부호의 부호 길이에 무관하게 제안한 복호 방식은 기존 복호 방식에 비해 약 1.1[dB] ~ 1.2[dB] 정도의 성능 개선을 확인할 수 있었다.

• ETRI Journal
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• 제37권1호
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• pp.54-60
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• 2015

The use of serial concatenated codes is an effective technique for alleviating the error floor phenomenon of low-density parity-check (LDPC) codes. An enhanced sum-product algorithm (SPA) for LDPC codes, which is suitable for serial concatenated codes, is proposed in this paper. The proposed algorithm minimizes the number of errors by using the failed check nodes (FCNs) in LDPC decoding. Hence, the error-correcting capability of the serial concatenated code can be improved. The number of FCNs is simply obtained by the syndrome test, which is performed during the SPA. Hence, the decoding procedure of the proposed algorithm is similar to that of the conventional algorithm. The error performance of the proposed algorithm is analyzed and compared with that of the conventional algorithm. As a result, a gain of 1.4 dB can be obtained by the proposed algorithm at a bit error rate of $10^{-8}$. In addition, the error performance of the proposed algorithm with just 30 iterations is shown to be superior to that of the conventional algorithm with 100 iterations.

• 전자통신동향분석
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• 제38권5호
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• pp.34-50
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• 2023

Quantum error correction is a key technology for achieving fault-tolerant quantum computation. Finding the best decoding solution to a single error syndrome pattern counteracting multiple errors is an NP-hard problem. Consequently, error decoding is one of the most expensive processes to protect the information in a logical qubit. Recent research on quantum error decoding has been focused on developing conventional and neural-network-based decoding algorithms to satisfy accuracy, speed, and scalability requirements. Although conventional decoding methods have notably improved accuracy in short codes, they face many challenges regarding speed and scalability in long codes. To overcome such problems, machine learning has been extensively applied to neural-network-based error decoding with meaningful results. Nevertheless, when using neural-network-based decoders alone, the learning cost grows exponentially with the code size. To prevent this problem, hierarchical error decoding has been devised by combining conventional and neural-network-based decoders. In addition, research on quantum error decoding is aimed at reducing the spacetime decoding cost and solving the backlog problem caused by decoding delays when using hardware-implemented decoders in cryogenic environments. We review the latest research trends in decoders for quantum error correction with high accuracy, neural-network-based quantum error decoders with high speed and scalability, and hardware-based quantum error decoders implemented in real qubit operating environments.

• Journal of Communications and Networks
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• 제17권3호
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• pp.213-220
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• 2015

In this paper, we present a reliability-based iterative proportionality-logic decoding algorithm for two classes of structured low-density parity-check (LDPC) codes. The main contributions of this paper include: 1) Syndrome messages instead of extrinsic messages are processed and exchanged between variable nodes and check nodes, which can reduce the decoding complexity; 2) a more flexible decision mechanism is developed in which the decision threshold can be self-adjusted during the iterative process. Such decision mechanism is particularly effective for decoding the majority-logic decodable codes; 3) only part of the variable nodes satisfying the pre-designed criterion are involved for the presented algorithm, which is in the proportionality-logic sense and can further reduce the computational complexity. Simulation results show that, when combined with factor correction techniques and appropriate proportionality parameter, the presented algorithm performs well and can achieve fast decoding convergence rate while maintaining relative low decoding complexity, especially for small quantized levels (3-4 bits). The presented algorithm provides a candidate for those application scenarios where the memory load and the energy consumption are extremely constrained.

• ETRI Journal
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• 제32권2호
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• pp.273-280
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• 2010

The overall channel capacity of a multihop wireless path drops progressively over each hop due to the cascading effect of noise and interference. Hence, without optimal rate adaptation, the video quality is expected to degrade significantly at any client located at a far-edge of an ad-hoc network. To overcome this limitation, decoding and forwarding (DF), which fully decodes codewords at each intermediate node, can be employed to provide the best video quality. However, complexity and memory usage for DF are significantly high. Consequently, we propose syndrome-based partial decoding (SPD). In the SPD framework an intermediate node partially decodes a codeword and relays the packet along with its syndromes if the packet is corrupted. We demonstrate the efficacy of the proposed scheme by simulations using actual 802.11b wireless traces. The trace-driven simulations show that the proposed SPD framework, which reduces the overall processing requirements of intermediate nodes, provides reasonably high goodput when compared to simple forwarding and less complexity and memory requirements when compared to DF.

• 융합신호처리학회논문지
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• 제11권3호
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• pp.226-231
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• 2010

본 논문에서는 희소 패리티 검사 행열로부터 생성된 생성행열을 사용하여 에러 정정능력과 높은 부호율을 갖는 DC-free 다중 모드 부호를 구성하기 위한 새로운 부호화 기법을 제안 한다. 제안된 기법은 별개의 후보 부호워드들을 생성하기 위해 고속 생성행열들을 이용한다. 복호 과정의 복잡도는 수신된 부호워드의 신드롬이 ‘0’인지 아닌지에 따라 결정된다. 만약 신드롬이 ‘0’ 인 경우 복호는 수신된 부호워드의 잉여 비트들을 삭제하여 간단히 수행되고, ‘1’인 경우에는 합곱 (sum-product) 알고리즘으로 복호가 이루어진다. 제안된 기법은 DC 성분을 억압하면서도 낮은 비트 오율을 가질 수 있다.