• 제목/요약/키워드: Switching power

검색결과 4,316건 처리시간 0.036초

PWM 인버터용 SNUBBER 설계 (Design of Snubber for PWM Inverter)

  • 오진석
    • 한국안전학회지
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    • 제8권4호
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    • pp.95-100
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    • 1993
  • In power transistor switching circuit have shunt snubber(dv/dt limiting capacitor) and series snubber (di/dt limiting inductor). The shunt snubber is used to reduce the turn-off switching loss and the series snubber is used to reduce the turn-on switching loss. Design procedures are derived for selecting the capacitance, inductor and resistance to limit the peak voltage and current values. The action of snubber is analyzed and applied to the design for safety PWM inverter.

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Two-transistor 포워드 컨버터에서 소프트 스위칭 기법의 손실 계산

  • Kim Marn-Go
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 전력전자학술대회 논문집
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    • pp.698-701
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    • 2001
  • Loss analyses of two soft switching techniques for two-transistor forward converters are presented. The sums of snubber conduction and capacitive turn-on losses for two transistors are calculated to compare the losses of two techniques. While the conventional soft switching technique shows the loss difference between two transistors, proposed soft switching technique shows equal as well as lower loss in two transistors.

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태양광 인버터의 노치 필터 최적 설계 (Optimal Design of Notch Filter in Photovoltaic Inverter)

  • 김용래;허철영;이영권;최익;최주엽
    • 한국태양에너지학회 논문집
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    • 제39권2호
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    • pp.81-92
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    • 2019
  • When Photovoltaic inverter is connected to grid and used as PVPCS (Photovoltaic Power Conditioning System), 120 Hz AC ripple occurs at the dc-link capacitor voltage. This AC ripple reduces the efficiency of PVPCS and shortens the lifetime of the capacitor. In this paper, we design a notch filter to remove AC ripple. As a result, the AC voltage ripple was removed from the dc link and the THD of the PVPCS output current with the notch filter was lowered. This notch filter is determined by the damping coefficient, the bandwidth coefficient, and the switching frequency. Among these, the switching frequency determines the switching loss and the size of the LC filter, and the PVPCS with the high switching frequency has a greater efficiency loss due to the switching loss than the efficiency improvement by the notch filter. Therefore, it is important to set the optimum switching frequency in the PVPCS with the notch filter applied. In this paper, THD and switching loss of PVPCS output current with notch filter are calculated through simulation, and cost function to calculate optimum switching frequency through data is proposed.

ZVS-LCC형 고주파 공진 인버터의 특성해석 (Characteristic Analysis of LCC Type High Frequency Resonant Inverter using ZVS)

  • 서철식;김동희;노채균;남승식;변영복;이봉섭
    • 전력전자학회논문지
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    • 제4권4호
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    • pp.311-317
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    • 1999
  • 본 논문에서는 SEPP-LCC형 부하 공진 고주파 인버터의 한 회로형식을 제안하고, 그 동작원리에 관해서 명확히 하였다. 제안한 인버터는 스위칭 소자 양단에 병렬로 커패시터를 추가함으로써 스위칭 소자의 턴-온과 턴-오프시에 발생하는 스위칭 손실, 노이즈, 스트레스 등을 줄일 수 있다. 범용성 있는 회로해석을 위하여 무차원화 파라미터를 도입하였고, 동작특성 및 평가를 통하여 얻은 특성치를 이용하여 회로를 설계하였다. 또한, 실험을 통하여 이론해석의 정당성을 입증하였다.

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Two Switches Balanced Buck Converter for Common-Mode Noise Reduction

  • Kanjanasopa, Warong;Prempraneerach, Yothin
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2004년도 ICCAS
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    • pp.493-498
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    • 2004
  • The EMI noise source in a switching mode power supply is dominated by a common mode noise. If we can understand the common mode noise occurring mechanism, it is resulted to find out the method to suppress the EMI noise source in the switching mode power supply. The common mode noise is occurring mostly due to circuit is unbalanced which is caused by the capacitive coupling to frame ground, which passes through a heatsink of the switching devices. This research paper presents a new effective balancing method of buck converter circuit by mean of grounding the parasitic and compensation capacitors in correct proportion which is called that the common mode impedance balance (CMIB). The CMIB can be achieved by source, transmission line and termination balanced, such balancing, the common mode current will be cancelled out in the frame ground. The greatly reduced common mode noise can be confirmed by the experimental results.

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MOS-GTO의 스위칭 특성과 Gate Drive 회로 설계에 관한 연구 (A study on the switching character of MOS-GTO and the design of gate drive circuit)

  • 노진입;성세진
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1991년도 추계학술대회 논문집 학회본부
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    • pp.231-233
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    • 1991
  • This paper discribes a study on the switching character of MOS-GTO and the design of gate drive circuit. Chopping power supply converter, synchronious and asyncronious motor speed adjustment, inverter, etc., needs low drive energy "high frequency" switches. To fulfill these need, switches must have rapid switching time and insulated gate control. MOS-GTO structure is well suited to these constraints. The power switch is serial installation of a GTO thyrister and a MOS Transistor. The gate of the GTO is linked to positive pole of the cascode structure via a MOS high voltage transistor and ground via a transient absorber diode. This high performance MOS-GTO assembly considerably increases the strength which facilitate the drive of GTO thyristers.

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차단전압 균형과 넓은 부하범위를 갖는 새로운 3-레벨 ZVS PWM DC-DC 컨버터 (A Novel Three-Level ZVS PWM Inverter Topology for High-Voltage DC/DC Conversion Systems with Balanced Voltage Sharing and Wider Load Range)

  • 송인호;유상봉;서범석;현동석
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1996년도 창립기념 전력전자학술발표회 논문집
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    • pp.71-75
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    • 1996
  • As the Three-level ZVS PWM DC-DC converter operates likewise full-bridge ZVS PWM DC-DC converter and the blocking voltage of each switching device is a half of the DC-link voltage, it is suitable for the high imput voltage applications. However, it has some problems as follows; The blocking voltage of each devices is unbalanced and it causes the power losses of the inner switching devices to be increased. Also, it has narrow load range so that the switching losses and the efficiency are reduced as it goes to the light load. This paper presents an nove Three-level ZVS PWM DC-DC converter, which can reduce the overvoltage of the outer switches, eliminate the unbalance of the voltage sharing between the switches at turn-off due to the stray inductances, and operate from no load to full load. The characteristics and the performances of the proposed Three-level ZVS PWM DC-DC converter are verified by simulation and experimental results

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유도가열기용 직.병렬 공진 고주파 인버터의 설계 (Design of High Frequency Inverter with Series-parallel Load-Resonant for Induction Heating application)

  • 홍순일;손의식
    • 조명전기설비학회논문지
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    • 제14권6호
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    • pp.12-17
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    • 2000
  • IN induction heating system the high frequency operation allows a rapid response to current fluctuation in the inverter and result in improved welding quality. To work induction heating of nonferrous metals, a welding power supply is need high working frequency and high power. This paper is shown design technique for increasing working frequency in induction heating for welding coppers. A series-parallel resonate inverter consists of H-type bridges, each of whose arms is composed of a combination of two parallel IGBTs. Inverter operating with the fixed frequency is controlled by pulse width modulation (PWM). As switching adapted the Zero-Voltage Switching technique to reduce switching losses the system is high efficiency. The propose inverter has feature which is high efficiency for very wide load variations with a narrow range of duty cycle ratio control and load short circuit capability. Detailed experimental results obtained from a 48[V] output, 500[W] experimental inverter are presented to verify the concept.

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Comparison of Active-Clamp and ZVT Techniques Applied to Tapped-Inductor DC-DC Converter with Low Voltage and Large Current

  • Abe Seiya;Ninomiya Tamotsu
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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    • pp.222-226
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    • 2001
  • This paper compares three kinds of soft-switching circuits from viewpoints of surge suppression, load characteristic, and power efficiency for a tapped-inductor buck converter with low voltage and high current. As a result, these soft-switching techniques have achieved much higher efficiency of $80\%$ when compared with a hard-switching buck converter for the output condition of 1V and 20A.

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A Study on PFC of Active Clamp ZVS Flyback Converter

  • Choi Tae-Young;Ahn Jeong-Joon;Ryu Dong-Kyun;Lee Woo-Suk;Won Chung-Yuen;Kim Soo-Seok
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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    • pp.611-616
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    • 2001
  • This paper analyzed PFC of active clamp ZVS flyback converter by adding two methods PFC (power Factor Correction) circuit - two-stage and single-stage. The addition of active clamp circuit also provides a mechanism for achieving ZVS of both the primary and auxiliary switches. ZVS also limits the turn off di/dt of the output rectifier, reducing rectifier-switching loss and switching noise, due to diode reverse recovery. As a result, the proposed converters have characteristics of the reduced switching noise and high efficiency in comparison to conventional flyback converter. The simulation and experimental results show that the proposed converter improve the input PF of 300W ZVS flyback converter by adding single-stage, two-stage PFC circuit.

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