• Journal of Electrical Engineering and Technology
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• 제11권6호
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• pp.1674-1683
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• 2016

In this paper, a Finite Control Set Model Predictive Control (FCS-MPC) for a five level cascaded multilevel inverter (CMLI) with reduced switch topology is proposed. Five switches are used here instead of conventionally used eight switches. The main contribution of this paper is to make the MPC controller work for the reduced switch topology using only 19 voltage vectors in place of conventional 61 voltage vectors for a five level CMLI. This simplifies the execution of the MPC algorithm, paving a way for the significant reduction in the computational time. The controller makes use of the excellent ability of MPC to multitask, by adding one more objective which is to reduce the average switching frequency in addition to controlling the load current. This is especially important, since switching losses and therefore switching frequency is significant for high-power applications. The trade-off of this MPC is that the current is not as smooth as the 61 vector scheme, but well within the limits of IEEE standards. The results shown prove that this MPC works well in steady state and dynamic conditions too.

• Journal of Power Electronics
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• 제16권4호
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• pp.1469-1482
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• 2016

In hybrid energy storage systems, supercapacitors are usually connected in series to meet the required voltage levels. Equalizers are effective in prolonging the life of hybrid energy storage systems because they eliminate the voltage imbalance on cells. This study proposes a modularized equalizer, which is based on a combination of a half-bridge inverter, an inductor, and two auxiliary capacitors. The proposed equalizer inherits the advantages of inductor-based equalization systems, but it also offers unique merits, such as low switching losses and an easy-to-use control algorithm. The zero-voltage switching scheme is analyzed, and the power model is established. A fixed-frequency operation strategy is proposed to simplify the control and lower the cost. The switching patterns and conditions for zero-voltage switching are discussed. Simulation results based on PSIM are presented to verify the validity of the proposed equalizer. An equalization test for two supercapacitor cells is performed. An experimental hybrid energy storage system, which consists of batteries and supercapacitors, is established to verify the performance of the proposed equalizer. The analysis, simulation results, and experimental results are in good agreement, thus indicating that the circuit is practical.

• 한국정보과학회논문지:정보통신
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• 제28권4호
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• pp.657-664
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• 2001

선행 논문(제1부)[13]에서는 광 베니언-형 교환 망에 있어 누화를 야기하는 멀티캐스트 접속들간의 관계를 그래프로 표현하고, 해당 그래프의 차수의 상한을 제시하였다. 본 논문(제2부)에서는 교환소자를 달리하는 멀티캐스팅의 스케줄링에서의 라우팅 횟수 즉, 스케줄링 길이에 대해 다룬다. 최적의 스케줄링 길이를 구하는 문제는 NP-complete이므로 최적 길이의 상한의 두 배 이내의 길이를 제공하는 근사 알고리즘을 제시한다. 아울러, 링크를 달리하는(즉, 넌블럭킹) 멀티캐스팅에 관한 스케줄링 길이를 고찰한다. 얻어진 스케줄링 길이 하에서 다양한 넌블럭킹 베니언-형 멀티캐스팅 망들을 규명한다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제11권12호
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• pp.6116-6132
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• 2017

The proxy re-encryption allows an intermediate proxy to convert a ciphertext for Alice into a ciphertext for Bob without seeing the original message and leaking out relevant information. Unlike many prior identity based proxy re-encryption schemes which are based on the number theoretic assumptions such as large integer factorization and discrete logarithm problem. In this paper, we first propose a novel identity based proxy re-encryption scheme which is based on the hardness of standard Learning With Error(LWE) problem and is CPA secure in the standard model. This scheme can be reduced to the worst-case lattice hard problem that is able to resist attacks from quantum algorithm. The key step in our construction is that the challenger how to answer the private query under a known trapdoor matrix. Our scheme enjoys properties of the non-interactivity, unidirectionality, anonymous and so on. In this paper, we utilize primitives include G-trapdoor for lattice and sample algorithms to realize simple and efficient re-encryption.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 학술대회 논문집 전문대학교육위원
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• pp.127-133
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• 2001

In SRM drive, the ON OFF angles of each phase switch should be accurately controlled in order to control the torque and speed stably. The accuracy of the switching angles is dependent upon the resolution of the encoder and the sampling period of the microprocessor, that are used to provide the information of the rotor position and to control the SRM power circuit, respectively. However, as the speed increases, the amount of the switching angle deviation from the preset values is also increased. Therefore, the low cost encoder suitable for the practical and stable SRM drive is proposed and the control algorithm to provide the switching signals using the simple digital logic circuit is also presented in this paper. As a result, a stable high speed SRM drive can be achieved by the high resolution switching angle control and it is verified from the experiments that the proposed encoder and logic controller can be a powerful candidate for the practical low cost SRM drive.

• Journal of Power Electronics
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• 제14권3호
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• pp.468-477
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• 2014

This study proposes an optimized design of a dual active bridge converter for a low-voltage charger in a military uninterrupted power supply (UPS) system. The dual active bridge converter is among various bi-directional DC/DC converters that possess a high-efficiency isolated bi-directional converter. In the general design, the zero-voltage switching(ZVS) region is reduced when the battery voltage is high. By contrast, efficiency is low because of high conduction losses when the battery voltage is low. Variable switching frequency is applied to increase the ZVS region and the power conversion efficiency, depending on battery voltage changes. At the same duty, the same power is obtained regardless of the battery voltage using the variable switching frequency. The proposed method is applied to a 5 kW prototype dual active bridge converter, and the experimental results are analyzed and verified.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1991년도 하계학술대회 논문집
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• pp.596-599
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• 1991

This paper describes a novel switching algorithm of series connected power semiconductors for high voltage applications. In order to improve the reliability and efficiency of high voltage static power converters, we study on the switching characteristics of series connected power semiconductors and then propose "a servo control of snubber capacitor value" for the dynamic voltage balancing under turn-off state in series connected power semiconductors. Finally, we illustrate the validity of this algorithm by computer simulation and experimental results.

• 한국정밀공학회지
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• 제18권7호
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• pp.40-45
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• 2001

This paper proposes a methodology for the small-displacement-movement of a piston and develops a hybrid control algorithm for the precision position control of a pneumatic rodless cylinder. The pneumatic system uses the voltage-proportional solenoid valves to minimum valve switching since the on/off type valves are create diffculties for accurate position control and induce a lot of valve switching. For the accurate position control a methodology for the small-displacement-movement of the piston is developed and identified experimentally. The main consideration on the development of the hybrid control law is to eliminate a stick-slip phenomenon in the pneumatic control system. This paper addresses these critical issues and presents experimental results for the pneumatic control system.

• 한국정보처리학회논문지
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• 제7권6호
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• pp.1949-1955
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• 2000

This paper proposes a multistage interconnection ATM switching network without internal blocking. The first is recirculating shuffle-exchange network improved on hardware complexity. The next is connected to Rank network with tree structure. In this network, after the packets transferred to the same output ports are given each priority, only a packet with highest priority is sent to the next, an the others are recirculated to the first. Rearrangeability through decomposition and composition algorithm is applied for the transferred packets in hanyan network and all they arrive at a final destinations. To analyze throughput, waiting time and packet loss ratio according tothe size of buffer, the probabilities are modeled by a binomial distribution of packet arrival.

• 전기학회논문지
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• 제60권5호
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• pp.1043-1048
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• 2011

Test vector reordering is a very effective way to reduce power consumption during test application. But, it is time-consuming and complicated processes, and it does not consider internal circuit structure, which may limit the effectiveness. In this paper, we order test vectors using fanout count of primary inputs that consider the internal circuit structure, which may reduce the switching activity. Then, we reorder test test vectors again by using Hamming distance between test vectors. We proposed FOVO algorithm to perform these two ideas. FOVO is an effective way to reduce power consumption during test application. The algorithm is applied to benchmark circuits and we get an average of 3.5% or more reduction of the power consumption.