• The Transactions of the Korean Institute of Electrical Engineers
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• v.39 no.12
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• pp.1317-1320
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• 1990

The inductive reactance losses of a superconducting current generator built at Case Western Reserve University has been analyzed. The calculations of the field in the spot make it possible to estimate the spot inductance as well as the filament inductance on the foil. It is shown that magnetic energy lost in switching the current is mainly due to the amplitude of the fluctuation in voltage associated with the inductive reactance losses of a superconducting current generator.

• Proceedings of the KIEE Conference
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• 1989.07a
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• pp.540-543
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• 1989

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.60 no.4
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• pp.246-252
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• 2011

In this paper proposes the soft-switching boost converter and MPPT control for improving the efficiency of PV system. The proposed converter designed H-bridge auxiliary resonant circuit. By this circuit, all of the switching devices perform the soft switching under the zero voltage and zero current condition. Therefore the periodic switching losses can be decreased at turn on, off. The soft switching boost converter designs for 1.5[kW] solar module of the power conversion. Thus, this soft switching boost converter is simulated by MATLAB simulation using Newton-Method algorithm. As a result, Proposed Soft Switching Converter compared to a typical boost converter switching loss was reduced about 61%. And the overall system efficiency was verified to increase about 3.3%.

• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.388-391
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• 1996

The conventional high frequency phase-shifted full bridge DC-DC converter has a disadavantage that a circulating current flows through transformer and switching devices during the freewheeling interval Due to this circulating current, RMS current stress, conduction losses of transformer and switching devices are increased. To alleviate this problem, this study provides a novel circulating current free type high frequency soft switching phase-shifted full bridge DC-DC converter which applies the energy recovery snubber(ERS) attached at the secondary side of transformer. The ERS adopted in this study is consisted of three fast recovery diode($Ds_1$, $Ds_2$, $Ds_3$), two resonant capacitor($Cs_1$, $Cs_2$) and a small resonant inductor [(Lr) : It can be ignored because the transformer leakage inductance(Ll) is able to use in stead of inserting the resonant inductor(Lr)]

• Journal of Power Electronics
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• v.15 no.6
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• pp.1429-1437
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• 2015

A new parallel hybrid soft switching converter with low circulating current losses during the freewheeling state and a low output current ripple is presented in this paper. Two circuit modules are connected in parallel using the interleaved pulse-width modulation scheme to provide more power to the output load and to reduce the output current ripple. Each circuit module includes a three-level converter and a half-bridge converter sharing the same lagging-leg switches. A resonant capacitor is adopted on the primary side of the three-level converter to reduce the circulating current to zero in the freewheeling state. Thus, the high circulating current loss in conventional three-level converters is alleviated. A half-bridge converter is adopted to extend the ZVS range. Therefore, the lagging-leg switches can be turned on under zero voltage switching from light load to full load conditions. The secondary windings of the two converters are connected in series so that the rectified voltage is positive instead of zero during the freewheeling interval. Hence, the output inductance of the three-level converter can be reduced. The circuit configuration, operation principles and circuit characteristics are presented in detail. Experiments based on a 1920W prototype are provided to verify the effectiveness of the proposed converter.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.1
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• pp.65-71
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• 2015

This paper presents the efficiency analysis of a critical current mode interleaved PFC rectifier, in which each of three different semiconductor switches is employed as the active switch. The Si FET, SiC FET, and GaN FET are consecutively used with the prototype PFC rectifier, and the efficiency of the PFC rectifier with each different semiconductor switch is analyzed. An equivalent circuit model of the PFC rectifier, which incorporates all the internal losses of the PFC rectifier, is developed. The rms values of the current waveforms main circuit components are calculated. By adapting the rms current waveforms to the equivalent model, all the losses are broken down and individually analyzed to assess the conduction loss, switching loss, and magnetic loss in the PFC rectifier. This study revealed that the GaN FET offers the highest overall efficiency with the least loss among the three switching devices. The GaN FET yields 96% efficiency at 90 V input and 97.6% efficiency at 240 V, under full load condition. This paper also confirmed that the efficiency of the three switching devices largely depends on the turn-on resistance and parasitic capacitance of the respective switching devices.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.48 no.5
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• pp.269-277
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• 1999

In this paper, a novel dead time minimization algorithm is proposed for improving the output waveform of an inverter. The adverse effects of the dead time are mainly described by the voltage drop and the distortion factor of waveforms. The principle of the proposed algorithm is organized with forbidding unnecessary firings fo the inverter switches which are not conducted even though the gate signal is impressed. The proposed methods are explained with the conduction mode of output currents. The H/W and S/W implementation method of the proposed algorithm are also presented. The validity of the proposed algorithm is verified by comparing the simulation and experimental results with conventional methods. It can be concluded from the results that the proposed algorithm has the advantage which is able to reduce the harmonics in the output voltages and which the output voltage can nearly be equal to the reference value. Another advantage of the proposed method is the reduction of total numbers of switching so that the switching losses of inverter drives can be minimized.

• Journal of Power Electronics
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• v.2 no.2
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• pp.77-87
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• 2002

The purpose of this paper is to improve power conversion efficiency of three-phase soft-switching voltage-source inverter with an auxiliary resonant dc link (ARDCL) snubber circuit. Firstly, the operation principle of ARDCL snubber circuit is described. Secondly, this paper proposes an effictive generation method of zero voltage vector for three-phase voltage-source soft-switching inverter in power losses in which power losses in the ARDCL snubber circuit can be reduced. In particular, zero voltage holding interval in the inverter DC busline can be controlled due to the new generation scheme of zero voltage vector. Thirdly, a simulator for power loss analysis for power loss characteristics based on actual system, is developed. the validity of developed. The validity of developed simulator of proved with experimental results. Finally, power efficency of three-phase inverter is estimated according to high carrier frequency by using the simulatior.

• Journal of Power Electronics
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• v.15 no.2
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• pp.299-308
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• 2015

This study proposes four novel pulse width modulation (PWM) shoot-through control methods for impedance source (IS) galvanically isolated DC-DC converters. These methods are derived from a PWM control method with shifted shoot-through introduced by the authors in 2012. In contrast to the baseline solution, where the shoot-through states are generated by the simultaneous conduction of all transistors in the inverter bridge, our new approach is based on the shoot-through generation by one inverter leg. The idea is to increase the number of soft-switched transients and, therefore, decrease the dynamic losses of the front-end inverter. All the proposed approaches are experimentally verified through an insulated-gate bipolar transistor-based IS DC-DC converter. Conclusions are drawn in accordance with the results of the switching loss analysis.

• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.4
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• pp.259-267
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• 2019

An active clamp flyback (ACF) converter applies a clamp circuit and circulates the energy of leakage inductance to the input side, thereby achieving a zero-voltage switching (ZVS) operation and greatly reducing switching losses. The switching losses are further reduced by applying a gallium nitride field effect transistor (GaN-FET) with excellent switching characteristics, and ZVS operation can be accomplished under light load with boundary conduction mode (BCM) operation. Optimal design is performed on the basis of loss analysis by selecting magnetization inductance based on BCM operation and a clamp capacitor for loss reduction. Therefore, the size of the reactive element can be reduced through high-frequency operation, and a high-efficiency and high-power-density converter can be achieved. This study proposes an optimal design for a high-efficiency and high-power-density BCM ACF converter based on GaN-FETs and verifies it through experimental results of a 65 W-rated prototype.