• Journal of Power Electronics
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• v.19 no.2
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• pp.353-362
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• 2019

To address the problem of circulating current loss in the traditional zero-current switching (ZCS) full-bridge (FB) DC/DC converter, a ZCS FB DC/DC converter topology and modulation strategy is proposed in this paper. The strategy can achieve ZCS turn on and zero-voltage and zero-current switching (ZVZCS) turn off for the primary switches and realize ZVZCS turn on and zero-voltage switching (ZVS) turn off for the auxiliary switches. Moreover, its resonant circuit power is small. Compared with the traditional phase shift full-bridge converter, the new converter decreases circulating current loss and does not increase the current stress of the primary switches and the voltage stress of the rectifier diodes. The diodes turn off naturally when the current decreases to zero. Thus, neither reverse recovery current nor loss on diodes occurs. In this paper, we analyzed the operating principle, steady-state characteristics and soft-switching conditions and range of the converter in detail. A 740 V/1 kW, 100 kHz experimental prototype was established, verifying the effectiveness of the converter through experimental results.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1997.10a
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• pp.442-445
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• 1997

A challenging activity in the manufacturing industry is to perform in real time the continuous monitoring of the process state, the situation assessment and identification of the problem on line and diagnosis of the cause and importance of the problem if he process does not work properly. This paper describes LAT(Ladder Analysis Tool) system for fault tree generation to improving the fault diagnosis of CNC machine tools. The system consists of 4 steps which can automatically ladder analysis from ladder diagram to two diagnosis function models. The two diagnostic models based on he ladder diagram is switching function model and step switching function model. This system tries to overcome diagnosis deficiencies present machine tool.

• Proceedings of the KIPE Conference
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• 2003.07a
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• pp.216-222
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• 2003

Today we have excellent motor drive system using high frequency carrier PWM control voltage source inverter in the other hand, we have met serious problems caused by high frequency switching. PWM Cyclo-converter called Matrix converter is expected as the new strategy Possible to improve these problems and add some more convenient features suitable for new drive system. in this Paper, we will introduce the background, features and outline of this converter, and additionally introduce some remarkable activity on this converter

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.5
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• pp.1043-1048
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• 2011

Test vector reordering is a very effective way to reduce power consumption during test application. But, it is time-consuming and complicated processes, and it does not consider internal circuit structure, which may limit the effectiveness. In this paper, we order test vectors using fanout count of primary inputs that consider the internal circuit structure, which may reduce the switching activity. Then, we reorder test test vectors again by using Hamming distance between test vectors. We proposed FOVO algorithm to perform these two ideas. FOVO is an effective way to reduce power consumption during test application. The algorithm is applied to benchmark circuits and we get an average of 3.5% or more reduction of the power consumption.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.101-104
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• 2002

This paper propose that is algorithm of power dissipation reduction in the high level synthesis design for DSP(Digital Signal Processor), as the portable terminal system recently demand high power dissipation. This paper obtain effect of power dissipation reduction and switching activity that increase correlation of operands as input data of function unit. The algorithm search loop or repeatedly data to the input operands of function unit. That can be reduce the power dissipation using the new low power high level synthesis algorithm. In this Paper, scheduling operation search same nodes from input DFG(Data Flow Graph) with correlation coefficient of first input node and among nodes. Function units consist a multiplier, an adder and a register. The power estimation method is added switching activity for each bits of nodes. The power estimation have good efficient using proposed algorithm. This paper result obtain more Power reduction of fifty percents after using a new low power algorithm in a function unit as multiplier.

• Journal of Institute of Control, Robotics and Systems
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• v.20 no.3
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• pp.333-344
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• 2014

This is the survey paper on the role of kinematics in robot development. The robot is considered as a form of mechanical systems which includes closed-chain loop system, open-chain loop system and closed and open switching system. To analyze these systems, kinematic notations has been developed in kinematics of mechanical theory since 1955 and has been applied in robotics. Several kinematic notations including Denavit-Hartenberg notations have been reviewed. The status of development of the spherical motor which has a great impact on the future robot advancement has reviewed, and research activity on a spherical motor and its application to 3-D spatial mechanisms at UNIST is introduced. For the open and closed switching mechanical systems, the bipedal robots' walking theories using Zero Moment Point are reviewed. And current status regarding bipedal robots based on newly developed passive dynamic walking theory is reviewed with the research activity at UNIST on this subject.

• Bulletin of the Korean Chemical Society
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• v.30 no.9
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• pp.2138-2140
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• 2009

• Journal of Electrical Engineering and Technology
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• v.4 no.4
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• pp.559-565
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• 2009

Power dissipation during scan testing is becoming an important concern as design sizes and gate densities increase. The high switching activity of combinational circuits is an unnecessary operation in scan shift mode. In this paper, we present a novel architecture to reduce test power dissipation in combinational logic by blocking signal transitions at the logic inputs during scan shifting. We propose a unique architecture that uses dmuxed scan flip-flop (DSF) and transmission gate as an alternative to muxed scan flip-flop. The proposed method does not have problems with auto test pattern generation (ATPG) techniques such as test application time and computational complexity. Moreover, our elegant method improves performance degradation and large overhead in terms of area with blocking logic techniques. Experimental results on ITC99 benchmarks show that the proposed architecture can achieve an average improvement of 30.31% in switching activity compared to conventional scan methods. Additionally, the results of simulation with DSF indicate that the powerdelay product (PDP) and area overhead are improved by 28.9% and 15.6%, respectively, compared to existing blocking logic method.

• The KIPS Transactions:PartA
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• v.8A no.3
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• pp.279-286
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• 2001

This paper proposes a low power resource allocation and scheduling algorithm that minimized power consumption such as DSP circuit in high-level synthesis process. In this paper, we have used list-scheduling method for low power design in scheduling step. Also, it increase possibility to reuse input through resource sharing when assign resource. After scheduling, the resources allocation uses the power function in consideration of the result of calculating average hamming distances and switching activity between two input. First, it obtain switching activity about input value after calculate average hamming distances between two operator and find power value make use of bit pattern of the input value. Resource allocation process assign operator to minimize average hamming distance and power dissipation on all occasions which is allocated at each control step according to increase control step. As comparing the existed method, the execution time becomes fast according to number of operator and be most numberous control step. And in case of power that consume, there is decrease effect from 6% to 8% to be small.

• Journal of the Korea Convergence Society
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• v.11 no.4
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• pp.143-149
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• 2020

Many users enjoy a location-based augmented reality game such as Pokémon GO. From the perspective of attachment, this paper investigated the antecedents of Pokémon GO use. A total of 182 responses from Pokemon Go users was collected through an online survey. The result of regression analysis showed that attitude toward game characters, social interaction, competition, and physical activity increased attachment to game. Attention switching, however, decreased attachment to the game. This study suggested that attachment to mobile augmented games could be achieved through social interaction, competition, and physical activity. Implications for researchers and practitioners were discussed.