• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.9
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• pp.1755-1762
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• 2016

In this paper, a small areal dual-output SC(switched capacitor) DC-DC converter with a improved range of an input voltage is presented. The conventional SC DC-DC converter has an advantage of low cost and small chip area. But, it has a narrow input voltage range to convert efficiently. Also, it has a lager chip area and a lower power efficiency from multiple outputs. The proposed SC DC-DC converter improves the power efficiency by using the capacitor array structure which efficiently converts the voltage according to the input voltage. By sharing two switch array, it reduces the number of switches and capacitors from 32 to 25. The proposed SC DC-DC converter was manufactured in a $0.18{\mu}m$ CMOS process. In the simulation, the range of the input voltage is 0.7~ 1.8V, the max. power efficiency is 90%, and the chip area is $0.255mm^2$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.11 no.3
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• pp.172-178
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• 1986

The recent interest in the design of filters is motivatied by the fact that such filter can be fully integrated using standard metal-oxide-semiconductor processing technology. This is due to replacing all the resistors in the active RC filter network by the switched capacitors. The voltage gain of a SC filter depends only on the rations of capacitance and these ratios can be obtained and maintained to high accuracy. Therefore, it is known that a switched capacitor is much better than a resistor in temperature and linearity characteristics. This paper proposed a programmable SC filter and proved the fact that ${omega}_0$ Q and G of this circuit can be controlled by digital signal. Experiments show that SC filter remains the low sensitivities but it can't avoid little influence of parasitic capacitance. As the transfer characteristic of the SC filter is varied with sampling frequency and resistor array, SC filtering technigue can be applied for digital processing, speech analysis and synthesis and so on.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.1
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• pp.49-58
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• 1999

This paper describes an integrated low pass filter fabricated by using $0.8{\mu}m$ single poly CMOS ASIC technology. The filter has been designed for a 5th-order elliptic switched capacitor filter with cutoff frequency of 5khz, 0.1dB passband ripple. The filter consists of MOS swiches poly capacitors and five CMOS op-amps. For the realization of the SC filter, continuous time transfer function H(s) is obtained from LC passive type, and transfered as discrete time transfer H(z) through bilinear-z transform. Another filter has been designed by capacitor scaling for reduced chip area, considering dynamic range of the op-amp. The test results of two fabricated filters are cutoff frequency of 4.96~4.98khz, 35~38dB gain attenuation and 0.72~0.81dB passband ripple with the ${\pm}2.5V$power supply clock of 50KHz.

• International Journal of Aeronautical and Space Sciences
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• v.11 no.3
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• pp.201-205
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• 2010

DC/DC Switching power converters are commonly used to generate regulated DC output voltages with high-power efficiencies from different DC input sources. A switching converter utilizes one or more energy storage elements such as capacitors, or transformers to efficiently transfer energy from the input to the output at periodic intervals. The fundamental boost converter studied here consists of a power metal-oxide semiconductor field effect transistor switch, an inductor, a capacitor, a diode, and a pulse-width modulation circuit with oscillator, amplifier, and comparator. A buck converter containing a switched-mode power supply is also studied. In this paper, the electrical characteristics of DC/DC power converters are simulated by simulation program with integrated circuit emphasis (SPICE). Furthermore, power efficiency was analyzed based on the specifications of each component.

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.438-439
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• 2011

In this paper, soft switching bidirectional DC-DC converter is proposed. The proposed topology is added two auxiliary switches, two resonant capacitors and one resonant inductor to convectional bidirectional DC-DC converter. Therefore, this proposed topology can reduce switching loss of each power switch by ZVS (Zero Voltage Switching) and ZCS (Zero Current Switching). We have performed mode analysis, simulation and experiment for the proposed topology.

• Proceedings of the KIPE Conference
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• 1998.11a
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• pp.60-63
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• 1998

The widely used power supply (Switched Mode Power Supply : SMPS) as a source in order to stabilize direct current for electronics or communication systems has merits, when it is compared to the existing source for stability, such as high efficiency, small size, light weight by means of switching process of the semiconductor device which controls the flow of power. However, due to existence of inductors and capacitors used for charging energy, the source part in electronic or communication systems hasn't reached the speed, that is supposed to get, for achieving smaller size and lighter weight. In order to get smallness in size, it is necessary to increase switching frequency. And that makes devices for measuring energy smaller. Nevertheless, the rise switching frequency brings increases in switching loss, inductor loss, and power loss. Also, the occurrence of surge and noise caused by high frequency switching is getting higher. The resonant converter has been considered as one of methods that give solutions for the problems of SMPS and that method have been paid attention as a source technology in electronics and communication.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.529-530
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• 2008

The proposed CMOS Quadrature VCO for WLAN application was designed in TSMC $0.18\;{\mu}m$ RF CMOS technology. The QVCO based on NMOS back-gate as a coupling transistor and switched capacitors array without tail transistors is designed to generate quadrature output signals. The simulated results show that the QVCO core consumed 3.67 mA and 6.6 mW from a 1.8 V supply. The QVCO is tunable between $4.76\;GHz\;{\sim}\;6.35\;GHz$ and has a phase noise lower than -116.8 ㏈c/Hz at 1 MHz offset over the entire tuning range

• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.1034-1037
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• 2002

A switched-capacitor(SC) type DC-DC converter having capability of integrated circuit fabrication have been marked for the application of mobile equipments. Especially, a ring type SC power supply is featured by the flexible and dynamic voltage conversion ratio change. In this paper, an improvement of the gate driving techniques is proposed for high power efficiency and less area occupation on the chip. Furthermore, its power-saving operation in the stand-by state is proposed. The three-capacitors ring type power supply is really designed and discussed. As results, the simulation results shows the high efficiency of 92.1%, and the higher output put voltage of 10.5 V compared with conventional one of 8.6 V.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1197-1200
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• 2003

This paper presents A/D converter for the signal processing of infrared sensor and CMOS image sensor. The A/D converter designed in a 0.25um CMOS process provides a resolution of 10bits at a sampling rate of 50MS/s while dissipating 67mW at 2.5V supply voltage. This A/D converter is based on a pipeline architecture in which the number of bits converted per stage and the stage number are optimized to achieve the desired linearity and reduce power consumption as well. Simulation results show that the A/D converter using 1.5bit per stage MDAC with switched capacitors and dynamic comparators efficiently reduces the power consumption.

• Journal of Power Electronics
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• v.6 no.3
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• pp.253-263
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• 2006

A high performance and low cost single switch current fed energy recovery circuit (ERC) for an alternating current (AC) plasma display panel (PDP) is proposed. Since it is composed of only one power switch compared with the conventional circuit consisting of four power switches and two large energy recovery capacitors, the ERC features a simpler structure and lower cost. Furthermore, since all power switches can be switched under soft switching operating conditions, the proposed circuit has desirable merits such as increased reliability and low switching loss. Specifically, there are no serious voltage notches across the PDP with the aid of gas discharge current compensation, which can greatly reduce the current stress of all inverter switches, and provide those switches with the turn on timing margin. To confirm the validity of proposed circuit, its operation and performance were verified on a prototype for 7-inch test PDP.