• 제목/요약/키워드: Surrounding gate TFET

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Analytical Surface Potential Model with TCAD Simulation Verification for Evaluation of Surrounding Gate TFET

  • Samuel, T.S. Arun;Balamurugan, N.B.;Niranjana, T.;Samyuktha, B.
    • Journal of Electrical Engineering and Technology
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    • 제9권2호
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    • pp.655-661
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    • 2014
  • In this paper, a new two dimensional (2D) analytical modeling and simulation for a surrounding gate tunnel field effect transistor (TFET) is proposed. The Parabolic approximation technique is used to solve the 2-D Poisson equation with suitable boundary conditions and analytical expressions for surface potential and electric field are derived. This electric field distribution is further used to calculate the tunneling generation rate and thus we numerically extract the tunneling current. The results show a significant improvement in on-current characteristics while short channel effects are greatly reduced. Effectiveness of the proposed model has been confirmed by comparing the analytical results with the TCAD simulation results.