• Journal of Electrical Engineering and Technology
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• 제11권4호
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• pp.829-838
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• 2016

This paper focuses on the engineering trade-offs in designing capacitor voltage balancing schemes for modular multilevel converters (MMC) HVDC: regulation performance and switching loss. MMC is driven by the on/off switch operation of numerous submodules and the key design concern is balancing submodule capacitor voltages minimizing switching transition among submodules because it represents the voltage regulation performance and system loss. This paper first introduces the state-of-the-art MMC-HVDC submodule capacitor voltage balancing methods reported in the literatures and discusses the trade-offs in designing these methods for HVDC application. This paper further proposes a submodule capacitor balancing scheme exploiting a control signal to flexibly interchange between the on-state and the off-state submodules. The proposed scheme enables desired performance-based voltage regulation and avoids unnecessary switching transitions among submodules, consequently reducing the switching loss. The flexibility and controllability particularly fit in high-level MMC HVDC applications where the aforementioned design trade-offs become more crucial. Simulation studies for MMC HVDC are performed to demonstrate the validity and effectiveness of the proposed capacitor voltage balancing algorithm.

• Journal of Power Electronics
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• 제17권4호
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• pp.942-952
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• 2017

Modular multilevel converters (MMCs) have been receiving extensive research interest in high/medium-voltage applications due to its modularity, scalability, reliability, high-voltage capability, and excellent harmonic performance. Submodule capacitors are usually rather bulky because they have to withstand fundamental frequency voltage fluctuations. To reduce the capacitance of these capacitors, this study proposes a modified MMC with an active power decoupling circuit within each submodule. The modified submodule contains an auxiliary half bridge, with its capacitor split in two. Also, the midpoints of the half bridge and the split capacitors are connected by an inductor. With this modified submodule, the fundamental frequency voltage fluctuation can be suppressed to a great extent. The second-order voltage fluctuation, which is the second most significant component in submodule voltage fluctuations, is removed by the proper control of the second-order circulating current. Consequently, the submodule capacitance is significantly reduced. The viability and effectiveness of the proposed new MMC are confirmed by the simulation and experimental results. The proposed MMC is best suited for medium-voltage applications where power density is given a high priority.

• Journal of Power Electronics
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• 제16권5호
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• pp.1752-1762
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• 2016

To achieve higher reliability in the modular multilevel converters (MMC) for HVDC transmission systems, the internal condition of the DC capacitors of the submodules (SM) needs to be monitored regularly. For an online estimation of the SM capacitance, a controlled AC current with double the fundamental frequency is injected into the circulating current loop of the MMC, which results in current and voltage ripples in the SM capacitors. The capacitor currents are calculated from the arm currents and their switching states. By processing these AC voltage and current components with digital filters, their capacitances are estimated by a recursive least square (RLS) algorithm. The validity of the proposed scheme has been verified by simulation results for a 300-MW, 300-kV HVDC system. In addition, its feasibility has been verified by experimental results obtained with a reduced-scale prototype. It has been shown that the estimation errors for both the simulation and experimental tests are 1.32% at maximum.

• 전력전자학회논문지
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• 제23권6호
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• pp.433-439
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• 2018

This study considers the design of a submodule test circuit for the modular multi-level converter (MMC)-based HVDC systems. A novel submodule test circuit is proposed to provide not only an AC but also a DC component to the submodule current. However, the current waveforms depend on the capacitor voltages. Therefore, determining the capacitance value of the test circuit is important. Finding a proper capacitance value is easy when the proposed analysis method is used. Simulation and experimental results show the usefulness of the proposed method.

• Journal of Electrical Engineering and Technology
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• 제11권4호
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• pp.921-930
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• 2016

This paper proposes a design and control method for a high-voltage direction current modular multilevel converter (HVDC-MMC) considering the capacitor voltage ripple of the submodule (SM). The capacitor voltage ripple consists of the line frequency and double-line-frequency components. The double line- frequency component does not fluctuate according to the active power, whereas the line-frequency component is highly influenced by the grid-side voltage and current. If the grid voltage drops, a conventional converter increases the current to maintain the active power. A grid voltage drops, current increment, or both occur with a capacitor voltage ripple higher than the limit value. In order to reliably control an MMC within a limit value, the SM capacitor should be designed on the basis of the capacitor voltage ripple. In this paper, the capacitor voltage ripple according to the grid voltage and current are analyzed, and the proposed control method includes a current limitation method considering the capacitor voltage ripple. The proposed design and control method are verified through simulation using PSCAD/EMTDC.

• Journal of Power Electronics
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• 제18권5호
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• pp.1608-1617
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• 2018

The rapid and correct isolation of faulty submodules (SMs) is of great importance for improving the reliability of modular multilevel converters (MMCs). Therefore, a fast diagnosis method containing fault detection and fault location determination was presented in this paper. An improved incremental predictive model of arm current was proposed to detect failures, and the multi-step prediction method was used to eliminate the negative impact of disturbances. Moreover, a control method was proposed to strengthen the fault characteristics to rapidly locate faulty arms and faulty SMs by detecting the variation rate of the SM capacitor voltage. The proposed method can rapidly and easily locate faulty SMs under different load conditions without the need for additional sensors. The experimental results have validated the effectiveness of the proposed method by using a single-phase MMC with four SMs per arm.

• Journal of Power Electronics
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• 제18권6호
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• pp.1683-1696
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• 2018

Under the conventional control strategy, the asymmetry of arm impedances may result in the poor operating performance of modular multilevel converters (MMCs). For example, fundamental frequency oscillation and double frequency components may occur in the dc and ac sides, respectively; and submodule (SM) capacitor voltages among the arms may not be balanced. This study presents an enhanced control strategy to deal with these problems. A mathematical model of an MMC with asymmetric arm impedance is first established. The causes for the above phenomena are analyzed on the basis of the model. Subsequently, an enhanced current control with five integrated proportional integral resonant regulators is designed to protect the ac and dc terminal behavior of converters from asymmetric arm impedances. Furthermore, an enhanced capacitor voltage control is designed to balance the capacitor voltage among the arms with high efficiency and to decouple the ac side control, dc side control, and capacitor voltage balance control among the arms. The accuracy of the theoretical analysis and the effectiveness of the proposed enhanced control strategy are verified through simulation and experimental results.

• Journal of Power Electronics
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• 제17권1호
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• pp.96-105
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• 2017

In this paper, a hybrid modular multilevel converter (MMC) topology with an improved nearest level modulation method is proposed for medium-voltage high-power applications. The arm of the proposed topology contains N series connected half-bridge submodules (HBSMs), one full-bridge submodule (FBSM) and an inductor. By exploiting the FBSM, half-level voltages are obtained in the arm voltages. Therefore, an output voltage with a 2N+1 level number can be generated. Moreover, the total level number of the inserted submodules (SMs) is a constant. Thus, there is no pulse voltage across the arm inductors, and the SM capacitor voltage is rated. With the proposed voltage balancing method, the capacitor voltage of the HBSM is twice the voltage of the FBSM, and each IGBT of the FBSM has a relatively low switching frequency and an equalized conduction loss. The capacitor voltage balancing methods of the two kinds of SMs are implemented independently. As a result, the switching frequency of the HBSM is not increased compared to the conventional MMC. In addition, according to a theoretical calculation of the total harmonic distortion of the electromotive force (EMF), the voltage quality with the presented method can be significantly enhanced when the SM number is relatively small. Simulation and experimental results obtained with a MMC-based inverter verify the validity of the developed method.

• Journal of Power Electronics
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• 제19권2호
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• pp.529-539
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• 2019

The modular multilevel converter (MMC) has become a promising topology for high-voltage direct current (HVDC) transmission systems. To control a MMC system properly, the ac-side current, circulating current and submodule (SM) capacitor voltage are taken into consideration. This paper proposes a low-computation indirect model predictive control (IMPC) strategy that takes advantages of the conventional MPC and has no weighting factors. The cost function and duty cycle are introduced to minimize the tracking error of the ac-side current and to eliminate the circulating current. An optimized merge sort (OMS) algorithm is applied to keep the SM capacitor voltages balanced. The proposed IMPC strategy effectively reduces the controller complexity and computational burden. In this paper, a discrete-time mathematical model of a MMC system is developed and the duty ratio of switching state is designed. In addition, a simulation of an eleven-level MMC system based on MATLAB/Simulink and a five-level experimental setup are built to evaluate the feasibility and performance of the proposed low-computation IMPC strategy.