The purpose of this study was to evaluate the effect of different etching times on microtensile bond strength (${\mu}TBS$) to dentin both initial and after thermocycling with 3 different types of total-etching adhesives. Fifty four teeth were divided into 18 groups by etching times (5, 15, 25 sec), adhesives types (Scotchbond Multipurpose (SM), Single Bond (SB), One-Step (OS)) and number of thermocycling (0, 2,000 cycles). Flat dentin surfaces were prepared on mid-coronal dentin of extracted third molars. After exposed fresh dentin surfaces were polished with 600-grit SiC papers, each specimen was acid-etched with 35% phosphoric acid (5, 15, 25 sec) and bonded with 3 different types of total etching adhesives respectively. Then, hybrid composite Z-250 was built up. Half of them were not thermocycled (control group) and the ethers were subjected to 2,000 thermocycle (experimental group). They were sectioned occluso-gingivally into $1.0\;{\times}\;1.0\;mm^2$ composite-dentin beams and tested with universal testing machine at a crosshead speed of 1.0 mm/min. Within limited data of this study, the results were as follows 1. There was no statistically significant difference in ${\mu}TBS$ between the thermocycled and non-thermocycled groups, except for both SM and SB etched for 25 sec. 2. In thermocycled SM and SB groups, bond strength decreased by extended etching time. In total etching systems, adhesive durability for dentin could be affected by type of solvents in adhesive and etching time. Especially, extended etching time may cause deteriorate effects on bond strength when ethanol-based adhesive was used.
In this paper, CMOS SAR (Successive Approximation Register) A/D converter with 1.8V supply voltage is designed for IoT sensor processing. This paper proposes design of a 12-bit SAR A/D converter with two A / D converters in parallel to improve the sampling rate. A/D converter1 of the two A/D converters determines all the 12-bit bits, and another A/D converter2 uses the upper six bits of the other A/D converters to minimize power consumption and switching energy. Since the second A/D converter2 does not determine the upper 6 bits, the control circuits and SAR Logic are not needed and the area is minimized. In addition, the switching energy increases as the large capacitor capacity and the large voltage change in the C-DAC, and the second A/D converter does not determine the upper 6 bits, thereby reducing the switching energy. It is also possible to reduce the process variation in the C-DAC by proposed structure by the split capacitor capacity in the C-DAC equals the unit capacitor capacity. The proposed SAR A/D converter was designed using 0.18um CMOS process, and the supply voltage of 1.8V, the conversion speed of 10MS/s, and the Effective Number of Bit (ENOB) of 10.2 bits were measured. The area of core block is $600{\times}900um^2$, the total power consumption is $79.58{\mu}W$, and the FOM (Figure of Merit) is 6.716fJ / step.
Automatic FPC punching instrument for the improvement of working condition and cost saving is introduced in this paper. FPC(flexible printed circuit) is used to detect the contact position of K/B and button like a cellular phone. Depending on the quality of the printed ink and position of reference punching point to the FPC, the resistance and current are varied to the malfunctioning values. The size of reference punching point is 2mm and the above. Because the punching operation is done manually, the accuracy of the punching degree is varied with operator's condition. Recently, The punching accuracy has deteriorated severely to the 2mm punching reference hall so that assembly of the K/B has hardly done. To improve this manual punching operation to the FPC, automatic FPC punching system is introduced. Precise mechanical parts like a 5-step stepping motor and ball screw mechanism are designed and tested and low cost PC camera is used for the sake of cost down instead of using high quality vision systems for the FA. 3D Mechanical design tool(Pro/E) is used to manage the exact tolerance circumstances and avoid design failures. Simulation is performed to make the complete vision based punching machine before assembly, and this procedure led to the manufacturing cost saving. As the image processing algorithms, dilation, erosion, and threshold calculation is applied to obtain an exact center position from the FPC print marks. These image processing algorithms made the original images having various noises have clean binary pixels which is easy to calculate the center position of print marks. Moment and Least square method are used to calculate the center position of objects. In this development circumstance, Moment method was superior to the Least square one at the calculation of speed and against noise. Main control panel is programmed by Visual C++ and graphical Active X for the whole management of vision based automatic punching machine. Operating modes like manual, calibration, and automatic mode are added to the main control panel for the compensation of bad FPC print conditions and mechanical tolerance occurring in the case of punch and die reassembly. Test algorithms and programs showed good results to the designed automatic punching system and led to the increase of productivity and huge cost down to law material like FPC by avoiding bad quality.
Journal of the Korean Society of Propulsion Engineers
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v.2
no.3
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pp.99-106
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1998
The performance of the turbofan engine, a medium scale civil aircraft which has been developing in Rep. of Korea, was analyzed and the control scheme for optimization the performance was studied. The dynamic and real-time linear simulation was performed in the previous study The result was that the fuel scedule of the step increase overshoot the limit temperature(3105 $^{\cire}R$) of the high pressure turbine and got small surge margine of the high pressure compressor. Therefore a control scheme such as the LQR(Linear Quadratic Regulator) was applied to optimizing the performance in this studies. The linear model was expected for designing controller and the real time linear model was developed to be closed to nonlinear simulation results. The system matrices were derived from sampling operating points in the scheduled range and then the least square method was applied to the interpolation between these sampling points, where each element of matrices was a function of the rotor speed. The control variables were the fuel flow and the low pressure compressor bleed air. The controlled linear model eliminated the inlet temperature overshoot of the high pressure turbine and obtained maximum surge margins within 0.55. The SFC was stabilized in the range of 0.355 to 0.43.
Kim, Jang-Hwan;Kwon, Oh-Yun;Yi, Chung-Hwi;Cho, Sang-Hyun;Cynn, Heon-Seock;Choi, Heung-Sik
Physical Therapy Korea
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v.20
no.1
/
pp.18-27
/
2013
The purpose of this study was to compare the ring lock type knee-ankle-foot orthosis (KAFO) with newly developed 4-bar linkage KAFO on the gait characteristics of persons with poliomyelitis clinically. This 4-bar linkage is the stance control type KAFO which provide the stability during stance phase and knee flexion during swing phase. Two subjects participated in this study voluntarily. We provided the customized 4-bar linkage KAFO then asked the subjects to walk in level surface and stairs under the two different KAFO conditions. The characteristics of gait in the persons with poliomyelitis were evaluated using a 3D motion analysis system and force plate. Additionally 6 minute walk test for physiological cost index were conducted using pulse oximeter to measure the energy consumption. In the results of this study, the differences of 4-bar linkage KAFO compared with ring lock type KAFO are as follows: (1) Walking speed, stride length, and step length on level increased in subjects, (2) The gait symmetry was improved by generated knee flexion and decreased pelvic external rotation on level and stairs walking, (3) Decreased vertical excursion of center of mass and pelvic elevation during swing phase was decreased on level, (4) Knee extension moment, hip flexion moment, hip and knee internal rotation moment of non-braced limb were decreased on level walking, (5) Walking speed in 6-minute walk test was increased and physiological cost index was decreased. These findings indicate that 4-bar linkage KAFO compared with ring lock type KAFO is effective in enhancing pattern, endurance, and energy consumption in level surface and stairs walking.
Proceedings of the Korean Institute of Intelligent Systems Conference
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1993.06a
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pp.975-976
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1993
This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}
Purpose: The purpose of this study was to investigate the effect of microcurrent on fatigue of muscles in people who were flat-footed during gait. Methods: 10 flat-footed university students volunteered to participate in this study. 10 flat-footed subjects were divided into 2 groups, one group was experimental group of 5subjects(This group put on microcurrent induction shoes but the subjects were not able to feel the current.) and the other group was the control group of 5subjects(This group put on the general shoes which were similar in shape but microcurrent was not induced.) to perform double blind test and random sampling. Their gait muscle fatigue of 6 regions (vastus medialis, gastrocnemius, tibialis anterior, biceps femoris, erector spinae, and rectus abdominis muscle.) was measured by EMG MP150, Delsys Inc Boston, USA during walking and then they carried out the Harvard step with a platform (It was a arbitrarily made wooden platform of 100cm long, 50cm wide, 60cm high. They carried out climbing it for one second and descending it for one second by using the Metronome program, total 5minutes) for 5minutes. Right after that, the subjects walked on a treadmill at a speed of 4km/h for 10minutes and then their gait muscle fatigue of 6regions was assessed while they were walking on the ground as equally as before exercise. Results: The experimental group has resulted in lower average differences in gait muscle fatigue before and after exercise than those of the control group average 12.24Hz(P=0.009) at vastus medialis, average 8.52Hz(P=0.016) at gastrocnemius, average 9.16Hz(P=0.009) at tibialis anterior, average 8.66Hz(P=0.047) at biceps femoris, average 7.53Hz(P=0.016) at erector spinae, and average 7.80Hz(P=0.047) at rectus abdominis. All of the assessments of muscles have shown significant difference statistically. Conclusions: This result has shown that the use of micro current could decrease gait muscle fatigue of flat-footed people. It is recommended to use a microcurrent to reduce their gait muscle fatigue.
The large-scale production of antibiotics by filamentous mycelial organism requires and adequate supply of dissolved oxygen. In terms of productivity, it means that oxygen transfer is the rate-limiting step. Therefore, the oxygen transfer coefficients(K$\_$L/A) were determined in a broth involving a filamentous mycelial organism such as Streptomyces avermitilis for use in fermentations. To determine (K$\_$L/A) inn a stirred vessel, a great deal of effort is required to provide all the cells with a sufficient oxygen supply. To overcome the oxygen limitation in a batch culture, a fed-batch culture was applied to control the growth rate by an intermittent supply of nutrients. Thus, it was possible to maintain a suitable dissolved oxygen concentration at a low agitation rate. The optimal agitation speed was 350 rpm at low cell concentrations (below 7 g/L) by considering the efficiency of agitation and shear stress. The (K$\_$L/A) was found to decrease from 64.26 to 29.21h.$\^$-1/ when the biomass concentration was increased from 9.82 to 12.06 g/L. In addition, and increase in viscosity was also observed during the growth phase. By comparing the (K$\_$L/A) values for the various agitation and aeration rates, it was found that the effect of an increase in (K$\_$L/A) by aeration was reduced dramatically at high biomass concentrations. However, this effect was not observed when altering the agitation rate. This suggests that controlling the dissolved oxygen concentration by altering the agitation rate was more efficient than increase the aeration rate.
Park, Chan-Hee;Kim, Sang-Jung;Hwang, Ho-Suk;Lee, Hee-Gwan
Journal of the Korea Academia-Industrial cooperation Society
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v.13
no.6
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pp.2484-2490
/
2012
This study reports on the development and performance verification of cell simulation boards of simulator and the embedded program for board control of the battery management system (BMS) of electric vehicle (EV) cars, which manages the next-generation automotive lithium-ion battery pack. Here, we have improved the speed of the simulator by using operational (OP) amplifier and transistors that were connected in series. In addition, using a digital analog converter (DAC) in each channel, we have improved the performance by channel-to-channel isolation (isolation) as compared to the traditional methods. Furthermore, by constructing a current-limiting protection circuit, one can be protected from disturbance and, by utilizing a precision shunt resistor for the current sensor, we have increased the precision of the current control. In order to verify the performance of the developed simulator, we have performed the experiment 10 times, with values ranging from 0.5 V to 5 V, and a voltage drop step of 0.5 V. Significance analysis of experimental data, and repeatability tests were performed, showing an average standard deviation of 0.001~0.004 V, indicating high repeatability and high statistical significance of the current method and system.
Journal of the Institute of Electronics Engineers of Korea SC
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v.47
no.5
/
pp.1-8
/
2010
Clients require easy to use of product and operating and industry safety according to the change of a market and a factory. For overcoming it, this paper developed controller of take-out robots that take high speed and superprecision and supplement a week point as use the system based on network. development controller classify teaching pendant and center server PC. Center server PC service the information about all process to supervisor. Teaching pendant is the bridge that service various faculties such as control, user recognition, metallic pattern operation to the user using injection molding. The controller development for taking out injection molded body classify software and hardware. The development of software is divided into three step which is application program, user interface and device driver. the simple device driver is not classified and included in application program. The hardware induce the touch panel and wireless network and construct the effective process control and internet connection. The inject ion cycle of existing system was five second but advanced system has the inner four cycle, process efficiency and product operation through wireless network.
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