• Title/Summary/Keyword: Static RAM

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Design of Border Surveillance and Control System Based on Wireless Sensor Network (WSN 기반 국경 감시 및 제어 시스템 설계)

  • Hwang, Bo Ram;An, Sun Shin
    • KIPS Transactions on Computer and Communication Systems
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    • v.4 no.1
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    • pp.11-14
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    • 2015
  • WSN (Wireless Sensor Network) based on low-power is one of the core technologies in the ubiquitous society. In this paper, we present a border surveillance and control system in WSN environment. The system consists of static sensor node, mobile sensor node, static gateway, mobile gateway, server and mobile application. Mobile applications are divided into user mode and manager mode. So users monitor border surveillance through mobile phone and get information of border network environment without time and space constraints. In manager mode, for the flexible operation of nodes, manager can update to the software remotely and adjust the position of the mobile node. And also we implement a suitable multi-hop routing protocol for scalable low-power sensor nodes and confirm that the system operates well in WSN environment.

The Immediate Effects of Hamstring Eccentric Exercise and Static Stretching on Trunk Forward Bending (즉각적인 뒤넙다리근 편심성 운동과 정적 스트레칭이 몸통 전방 굽힘에 미치는 영향)

  • Kim, Tae-eun;Choi, Bo-ram
    • Physical Therapy Korea
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    • v.26 no.3
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    • pp.32-41
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    • 2019
  • Background: Limitations in hip flexion caused by tight hamstrings lead to excessive lumbar flexion and low back pain. Accordingly, many studies have examined how to stretch the hamstring muscle. However, no study has focused on the effect of hamstring eccentric exercise for tight hamstrings on trunk forward bending. Objects: We compared the short-term effect of hamstring eccentric exercise (HEE) and hamstring static stretching (HSS) on trunk forward bending in individuals with tight hamstrings. Methods: Thirty individuals with tight hamstrings participated in the study. The subjects were randomly allocated to either a HEE or HSS group. To determine whether the hamstrings were tight, the active knee extension (AKE) test was performed, and the degree of hip flexion was measured. To assess trunk forward bending, subjects performed the fingertip to floor (FTF) and modified modified Schober tests, and the degree of trunk forward bending was measured using an inclinometer. We used paired t-tests to compare the values before and after exercise in each group and independent t-tests to compare the two groups on various measures Results: The FTF test results were improved significantly after the exercise in both groups, and AKE for both legs increased significantly in both groups. There was no significant difference in the hip angles, mmS test results, or degree of trunk forward bending between groups after the exercise. No test results differed significantly between the two groups at baseline or after the exercise. Both groups increased hamstring flexibility and trunk forward bending. Conclusion: HSS and the HEE groups increased hamstring flexibility and trunk forward bending. However, HEE has additional benefits, such as injury prevention and muscle strengthening.

A Comparative Study of FMS Performance Evaluation Modeling Using FACTOR/AIM (FACTOR/AIM을 이용한 통합자동 생산시스템의 성능분석을 위한 비교연구)

  • Hwang, Heung-Suk
    • IE interfaces
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    • v.9 no.2
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    • pp.191-202
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    • 1996
  • A variety of approaches on performance evaluation modeling have appeared in the technical literature for flexible manufacturing systems(FMS) which can be evaluated only through computer simulation. This study represents a comparative approach for FMS performance evaluation modeling based on reliability, availability and maintainability, and life cycle cost. The methodology proposed in this research includes the following three-step generative approaches. First, a static model to find the initial system configuration is considered under the assumption that the system availability is given as one (failure and maintenance are not considered), and in second step, a stochastic simulation is proposed to serve as a performance evaluation model for FMS with stochastic failure and repair time. In the last step, we developed a simulation modeling using a simulator, FACTOR/AIM to consider a variety of performance factors and dynamic behavior of FMS. Also the applicability and validity of the proposed approaches has been tested and compared through the results of a sample problem using computer programs and procedures developed in each step.

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An Analysis for Turbulent Hybrid Bearings with Fluid Inertia and Swirl Injection Effects (유체의 관성력과 스월의 영향을 고려한 난류 하이브리드 베어링의 해석)

  • 이용복;김창호;최동훈
    • Tribology and Lubricants
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    • v.12 no.3
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    • pp.85-91
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    • 1996
  • An analysis for turbulent hybrid beatings with fluid inertia and swirl injection effect was derived for studying static characteristics of swirl-controlled hybrid journal. The swirl-controlled hybrid journal beating is considered to have more freedom in stability control in high speed rotating machinery. Current analysis is compared with experimental results with 3-recess hydrostatic journal bearing. The analysis revealed that the fluid momentum exchange at orifice discharge could produce pressure rise inside the recess region which can control the shear flow induced by journal rotation. The analysis also shows that the swirl-controlled hybrid journal beating has a capability of controlling load carrying capacity and stability by manipulating supply pressure and injection angle.

Design of A On-Chip Caches for RISC Processors (RISC 프로세서 On-Chip Cache의 설계)

  • 홍인식;임인칠
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.8
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    • pp.1201-1210
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    • 1990
  • This paper proposes on-chip instruction and data cache memories on RISC reduced instruction set computer) architecture which supports fast instruction fetch and data read/write, and enables RISC processor under research to obtain high performance. In the execution of HLL(high level language) programs, heavily used local scalar variables are stored in large register file, but arrays, structures, and global scalar variables are difficult for compiler to allocate registers. These problems can be solved by on-chip Instruction/Data cache. And each cycle of instruction fetch, pad delay causes the lowering of the processors's performance. Cache memories are designed in CMOS technology and SRAM(static-RAM), that saves layout area and power dissipation, is used for instruction and data storage. To speed up and support RISC processor's piplined architecture efficiently, hardwired logic technology is used overall circuits i cache blocks. The schematic capture and timing simulation of proposed cache memorises are performed on Apollo DN4000 workstation using Mentor Graphics CAD tools.

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An Optimum Paged Interleaving Memory by a Hierarchical Bit Line (계층 비트라이에 의한 최적 페이지 인터리빙 메모리)

  • 조경연;이주근
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.6
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    • pp.901-909
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    • 1990
  • With a wide spread of 32 bit personal computers, a simple structure and high performance memory system have been highly required. In this paper, a memory block is constructed by using a modified hierarchical bit line in which the DRAM bit line and the latch which works as a SRAM cell are integrated by an interface gate. And the new architecture memory DSRAM(Dynamic Static RAM) is proposed by interleaving the 16 memory block. Because the DSRAM works with 16 page, the page is miss ratio becomes small and the RAS precharge time which is incurred by page miss is shortened. So the DSRAM can implement an optimum page interleaving and it has good compatibility to the existing DRAMs. The DSRAM can be widely used in small computers as well as a high performance memory system.

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Design of a Scalable Systolic Synchronous Memory

  • Jeong, Gab-Joong;Kwon, Kyoung-Hwan;Lee, Moon-Key
    • Journal of Electrical Engineering and information Science
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    • v.2 no.4
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    • pp.8-13
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    • 1997
  • This paper describes a scalable systolic synchronous memory for digital signal processing and packet switching. The systolic synchronous memory consists of the 2-D array of small memory blocks which are fully pipelined and communicated in three directions with adjacent blocks. The maximum delay of a small memory block becomes the operation speed of the chip. The array configuration is scalable for the entire memory size requested by an application. it has the initial latency of N+3 cycles with NxN array configuration. We designed an experimental 200 MHz 4Kb static RAM chip with the 4x4 array configuration of 256 SRAM blocks. It was fabricated is 0.8$\mu\textrm{m}$ twin-well single-poly double-metal CMOS technology.

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Assessment of Recrystallization Behavior in Ingot-Breakdown Process of Alloy 718 (Alloy 718의 잉고트 파쇄공정시 재결정거동에 대한 해석)

  • Yeom, J.T.;Lee, C.S.;Kim, J.H.;Kim, N.Y.;Park, N.K.
    • Proceedings of the Korean Society for Technology of Plasticity Conference
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    • 2007.10a
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    • pp.42-45
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    • 2007
  • Recrystallization behavior during ingot-breakdown process of Alloy 718 was investigated with finite element analysis and experimental approaches. In order to analyze microstructural changes during the cogging process of an Alloy 718 ingot, the side-pressing and heat treatment tests were performed at different temperatures and ram speed. From the side-pressing and heat treatment test results, it was found that microstructural changes during hot forging of Alloy 718 ingot greatly influenced on a close interaction between dynamic and static-recrystallization behaviors. A recrystallization model of Alloy 718 was used to predict the complex microstructural variation during continuous heating and forging processes of the cogging, and the predicted grain size and its distribution were compared with the actual cogged Alloy 718 billet.

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Dynamic Modeling of Green Building Certification Criteria Using System Dynamics (시스템 다이내믹스를 활용한 친환경건축물 인증기준의 동태모형 개발에 관한 연구)

  • Choi, Woo Ram;Lee, Hyo Won
    • KIEAE Journal
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    • v.9 no.5
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    • pp.53-61
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    • 2009
  • Green Building Certification System currently going into effect is a static evaluation model. Therefore, as far as the sustainable development of certification system is concerned, further long-term evaluation is required. The main purpose of this study is to offer a model in a way of developing and verifying a dynamic model in Green Building Certification. A dynamic model development has been given System Dynamics based on the causal structure. Thus, this study focused on searching the causal structure of certification criteria and verifying the reality of the model through simulation processing after developing a model. In conclusion, the development of dynamic evaluation method can be attributed to systematic evaluation for the criteria of Certification System.

Efficient Implementation of the MQTT Protocol for Embedded Systems

  • Deschambault, Olivier;Gherbi, Abdelouahed;Legare, Christian
    • Journal of Information Processing Systems
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    • v.13 no.1
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    • pp.26-39
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    • 2017
  • The need for embedded devices to be able to exchange information with each other and with data centers is essential for the advent of the Internet of Things (IoT). Several existing communication protocols are designed for small devices including the message-queue telemetry transport (MQTT) protocol or the constrained application protocol (CoAP). However, most of the existing implementations are convenient for computers or smart phones but do not consider the strict constraints and limitations with regard resource usage, portability and configuration. In this paper, we report on an industrial research and development project which focuses on the design, implementation, testing and deployment of a MQTT module. The goal of this project is to develop this module for platforms having minimal RAM, flash code memory and processing power. This software module should be fully compliant with the MQTT protocol specification, portable, and inter-operable with other software stacks. In this paper, we present our approach based on abstraction layers to the design of the MQTT module and we discuss the compliance of the implementation with the requirements set including the MISRA static analysis requirements.