• Journal of the Semiconductor & Display Technology
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• v.23 no.3
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• pp.85-90
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• 2024

Conductive charging of electric vehicles has entered a stable stage, and various product lines have been developed and standards have been made. Inductive charging methods can be classified into various other methods such as Indirect Power Transfer, Coupled Magnetic Resonance, and Permanent Magnet Coupled Transfer. Since choosing the most effective charging method for electric vehicles is difficult, standardizing the method of wirelessly transferring power is still a challenge to be achieved in a future. SAE J2954 sets an overall standard of electric vehicle Wireless Power Transport system. This paper proposes a wireless charging module that installs two receiving coils at a certain distance under the vehicle to minimize coil alignment due to incorrect parking and other vehicle full length during static charging. Finally, we developed an ATmega128 MCU-based module prototype and tested it to verify the efficiency of lower misalignment probability in different alignment charging environments compared to conventional single VA coils.

• The KIPS Transactions:PartC
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• v.16C no.6
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• pp.747-752
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• 2009

The AUTOSAR(AUTOmotive Open System ARchitecture) is an open software platform for automotive. The AUTOSAR contains the modules of FlexRay that is the next generation automotive network protocol. We have developed the modules including FlexRay State Manager, FlexRay Transport, FlexRay Interface, FlexRay Transceiver Driver and FlexRay Driver based on the standard of the module. This thesis presented not only the result of development but the result of design and implementation. And the developed modules were ported to the microcontroller board and verified.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.29B no.11
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• pp.1-7
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• 1992

The conformance test is a methodology which verifies whether the Implementation Under Test (IUT) conforms to its standard specification or not. In this paper, first, the Conformance Test System(CTS) is implemented in prototype including verification test type, black-box test strategy, conformance test class, remote test structure, and IUT which is described by the ISO Estelle among Formal Description Techniques. Second, through this prototype the proposed system is experimented. The prototype is composed of two modules. The first module is the Estelle-to-Pascal preprocessor which converts the Estelle program to the corresponding Pascal program because the experimental IUT was described using the unexecutable code form of Estelle before being tested by the TD(Test Driver). The TD, the second module, is based on the master-slave concept and plays important role is CTS. The TD acts as the master with the IUTd being the slave. The prototype system is implemented using Turbo-C, Turbo-Pascal and Turbo-Assembly.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2005.06a
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• pp.169-172
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• 2005

Tiny camera module using in modern cellular phone requires precise assembly processes. Higher camera resolution and more functions such as zoom lens make the number of camera parts bigger. As market grows rapidly, automatic assembly process is required. However, diverse product line and short life cycle make it difficult. To attack this, a flexible and expandable lens assembly system is proposed. For the fast manufacturing line formation, modular concept is adopted. Also each module is designed to have intelligence to save system formation time. The assembly system is built up on the standard flat-form which provides vibration free base, air and electric supply, controllers, etc. Futhermore, the assembly cell has the capability of handling tiny, thin, or transparent parts which are very difficult to align with vision.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.58 no.2
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• pp.108-115
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• 2009

Recent advances in computer technology have brought more dependence on software to train control systems. Hence, the safety assurance of the vital software running on the railway system is very critical task and yet, not many works have been done. While much efforts have been reported to improve electronic hardware's safety, not so much systematic approaches to evaluate software's safety, especially for the vital software running on board train controllers. In this paper, we have developed the static software testing tool for railway signaling, especially Fagan Inspection module and checklists supporting module. This static testing tool for railway signaling can be utilized at the assessment phase, and also usefully at the software development stage also. It is anticipated that it will be greatly helpful for the evaluation on the software for railway signalling system.

• Journal of Advanced Marine Engineering and Technology
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• v.26 no.3
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• pp.382-388
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• 2002

Dissolved silica is one of fatal components at a boiler facility Therefore, a dissolved silica measurement system should be equipped for managing efficiently the boiler facility. Most of silica measurement systems are composed of a sensor module of single-beam type structure, and silica density is measured with a infrared spectrometry using the Lambert-beer method. However, such a system occurs measuring error of large range and inconsistency of a light source, because of measuring a standard sample and a measuring sample alternatively. This paper introduces a method that the sensor module has a split-beam type structure and a tungsten lamp. The proposed system can measure silica density quickly and precisely more than those composing of a single-beam type structure, because of measuring and comparing with two samples at a same time. And examination results are shown to compare efficiencies of the system and existing commercial products, and for an ammonia influence.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.864-867
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• 2005

In this paper we introduce a design of parallel architecture for wavelet transformation on FPGA. We implement wavelet transforms though lifting scheme and apply Daubechies4 transform equations. This technique has an advantage that we can obtain perfect reconstruction of the data. We divide our process to high pass filter and low pass filter. With this division, we can find coefficients from low and high pass filters simultaneously using parallel processing properties of FPGA to reduce processing time. From the equations, we have to design real number computation module, referred to IEEE754 standard. We choose 32 bit computation that is fine enough to reconstruct data. After that we arrange the real number module according to Daubechies4 transform though lifting scheme.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.7
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• pp.28-37
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• 1997

In this paper, we designed a motion estimator for MPEG-2 video coder using VHDL. Motion estimation is indispensable for encoding MPEG 2 video. Motion estimation takes over 50% computation power of video encoding 37 frames per second and is suitable for real-time processing. The number of data accesses for computation is fewer than 2 times compared with that of old one. This makes slower memory module available. We minimize input pins to migrate input data through PEs. This processor can compute various motio estimation modes at one calculation that is supported by MPEG-2 video standard. Also independent control architecture makes this processor a single processor or a sub module in amultimedia chip.

• IEMEK Journal of Embedded Systems and Applications
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• v.12 no.3
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• pp.177-184
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• 2017

High performance non-volatile memory system can mitigate the gap between main memory and storage. However, no single memory devices fulfill the requirements. Non-volatile Dual In-line Memory Module (NVDIMM) consisted of DRAMs and NAND Flashes has been proposed to achieve the performance and non-volatility simultaneously. When power outage occurs, data in DRAM is backed up into NAND Flash using a small-size external energy storage such as a supercapacitor. Backup and restore operations of NVDIMM do not cooperate with the operating system in the NVDIMM standard, thus there is room to optimize its operation. This paper analysis the operation of NVDIMM and proposes a method to reduce backup and restore time. Particularly, data compression is introduced to reduce the amount of data that to be backed up and restored. The simulation results show that the proposed method reduces up to 72.6% of backup and restore time.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.329-332
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• 2002

The traditional debug tools for chip tests and software developments need a huge investment and a plenty of time. These problems can be overcome by Embedded Debugger based the JTAG boundary Scan Architecture. Thus, the IEEE 1149.1 standard is adopted by ASIC designers for the testability problems. We designed the RED(Reusable Embedded Debugger) using the JTAG boundary Scan Architecture. The proposed debugger is applicable for not a chip test but also a software debugging. Our debugger has an additional hardware module (EICEM : Embedded ICE Module) for more critical real-time debugging.