Interconnection Process and Electrical Properties of the Interconnection Joints for 3D Stack Package with $75{\mu}m$ Cu Via
($75{\mu}m$ Cu via가 형성된 3D 스택 패키지용 interconnection 공정 및 접합부의 전기적 특성)
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- Journal of the Microelectronics and Packaging Society
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- v.12 no.2 s.35
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- pp.111-119
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- 2005