• 한국정보통신설비학회:학술대회논문집
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• 한국정보통신설비학회 2008년도 정보통신설비 학술대회
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• pp.486-490
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• 2008

본 논문에서는 Spurious NAK Suppression알고리즘을 통하여 RLP의 성능향상에 대한 기법을 제안한다. 일반적으로, Hybrid ARQ기법에서는 MAC과 Physical Layer에서의 Retransmission 및 Error Correction으로 무선환경에서의 Error를 줄이고 latency를 보장하고 있다. 그러나 Hybrid ARQ에서의 Multiple SAW나 Selective-ARQ에 의해서 인접한 Packet들 간의 out-of-sequence문제가 발생할 수 밖에 없으며, upper layer인 RLP(혹은 RLC)에서는 이를 re-sequencing하여야 하는 부담감이 생기게 된다. 본 논문에서는 RLP receiver에서의 re-sequencing방법에 있어서, 효율적으로 RLP-NAK의 전송시점을 결정하는 NAK suppression 방법을 제안하고 있으며, 실험을 통하여 높은 성능향상을 보임을 확인할 수 있다.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2003년도 종합학술발표회 논문집 Vol.13 No.1
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• pp.611-621
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• 2003

A spurious-suppressed transversal filter using the multiple-coupled line is proposed. The frequency characteristics of the multiple-coupled line are analyzed in detail. In order to compare the performances, the novel spurious-suppressed transversal filter using triple-coupled half-wavelength directional couplers is designed at 5 GHz. The spurious-suppression characteristics of the proposed transversal filter are verified by the full wave analysis and the measurement. The spurious response of the fabricated filter is effectively suppressed up to 13 GHz and the large attenuation is attained in the stopband.

• 한국전자파학회논문지
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• 제15권2호
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• pp.159-164
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• 2004

본 논문에서는 SIR CPW 대역통과 여파기의 고조파 억압을 위한 접힌 피드 구조를 제안하였고 이를 이용해 SIR CPW 대역통과 여파기를 설계하였다. 제안된 접힌 피드 구조는 넓은 저지대역을 갖는 저역통과 여파기의 특성을 보이며, CPW 대역통과 여파기에서 고조파 억압에 매우 유용하게 이용될 수 있다. 시뮬레이션 및 측정결과 접힌 피드 구조를 갖는 SIR CPW 대역통과 여파기는 5.8 f$_{0}$까지 -20 dB 이 하로 고조파를 억압하는 우수한 특성을 보임을 알 수 있었다.다.

• Journal of electromagnetic engineering and science
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• 제6권3호
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• pp.160-164
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• 2006

This paper describes a compact printed helical resonator and its application to a microwave oscillator circuit implemented in coplanar waveguide(CPW) technology. The high Q-factor and spurious-free characteristic of the resonator contribute to the phase noise reduction and the harmonic suppression of the resulting oscillator circuit, respectively. The designed resonator resonating at the frequency of 5.5 GHz showed a loaded Q of 180 in a chip area of only 40 % of the corresponding miniaturized hairpin resonator without any spurious resonances. The fully planar oscillator incorporated with this resonator showed additional phase noise reduction of 10.5 dB at 1 MHz offset and a second harmonic suppression enhancement of 6 dB when compared to those of a conventional CPW oscillator without the planar helical resonator(PHR) structure.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2001년도 종합학술발표회 논문집 Vol.11 No.1
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• pp.172-175
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• 2001

A novel microstrip type low-pass filter using thin or thick film resistors is proposed to efficiently eliminate harmonic spurious response in stop-band. The proposed low-pass filter shows the spurious suppression enhancement of 20 dB over a conventional one. The designed low-pass filter could be used as a harmonic rejection filter of a local oscillator for Ku-band satellite payload system.

• ETRI Journal
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• 제46권2호
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• pp.194-204
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• 2024

A new method is proposed to generate a 32-tupling frequency millimeter wave (MMW) with eight Mach-Zehnder modulators (MZMs) connected in parallel. Theoretical analyses and simulation experiments are conducted. The optical sideband suppression ratio (OSSR) of the obtained ±16th order optical sidebands are 61.54 dB and 61.42 dB, and the radio frequency spurious suppression ratios (RFSSRs) of the generated 32-tupling frequency MMW are 55.52 dB and 55.27 dB based on the theoretical analysis and simulation experiments, respectively; these outcomes verified the feasibility of the new method. The main parameters used to affect the stability of the generated signal are the modulation index and extinction ratio of MZM. Their effects on the OSSR and RFSSR of the generated signals are investigated when they deviate from their designed values. Compared with the other proposed methods for the generation of 32-tupling frequency MMW by MZM, our method has the best spectral purity and stability, and it is expected to have important MMW over fiber applications.

• ETRI Journal
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• 제28권4호
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• pp.529-532
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• 2006

This letter describes a compact printed helical resonator and its application to a microwave oscillator circuit implemented in coplanar waveguide (CPW) technology. The high quality (Q)-factor and spurious-free characteristic of the resonator contribute to the phase noise reduction and the harmonic suppression of the resulting oscillator circuit, respectively. The designed resonator showed a loaded Q-factor of 180 in a chip area of only 40% of the corresponding miniaturized hairpin resonator without any spurious resonances. The fully planar oscillator incorporated with this resonator showed an additional phase noise reduction of 10.5 dB at a 1 MHz offset and a second harmonic suppression enhancement of 6 dB when compared to those of a conventional CPW oscillator without the planar helical resonator structure.

• 한국통신학회논문지
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• 제21권2호
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• pp.526-533
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• 1996

In this paper, the 800 MHz band N fractional frquency synthesizer having 677 channel with 30 kHz channel bandwidth is designed on the based on the theory which is dervied in terms of the relation between reference freqiency and the number of channels, loop bandwidth and acquistion time. The experimental resuls show 10 Hz deviation from the bandwidth and acquisition time. The experimental results show 10 Hz deviation from the bandwidth, the spurious suppression of aroud -45 dBc and the acqusition time of 1.44 ms. The results satisfy the given specification, but don't achieve thebesired spurious -60 dBc suppression. It is found that 500 hop per second will be possible over the range from 800 to 820 MHz.

• Journal of electromagnetic engineering and science
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• 제11권2호
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• pp.105-112
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• 2011

In phase-locked frequency synthesizers, a fast-lock technique is frequently employed to overcome the trade-off between a lock-time and a spurious response. The function of fast-lock in a conventional PLL (Phased Lock Loop) IC (Integrated Circuit) is limited by a factor of 16, which is usually implemented by a scaling of charge pumper, and consequently a lock time improvement of a factor of 4 is possible using the conventional PLL IC. In this paper, we propose a novel external active fast-lock loop filter. The proposed loop filter provides, conceptually, an unlimited scaling of charge pumper current, and can overcome conventional trade-off between lock-time and spur suppression. To demonstrate the validity of our proposed loop-filter, we fabricated an X-band frequency synthesizer using the proposed loop filter. The loop filter in the synthesizer is designed to have a loop bandwidth of 100 kHz in the fast-lock mode and a loop bandwidth of 5 kHz in the normal mode, which corresponds to a charge pumper current change ratio of 400. The X-band synthesizer shows successful performance of a lock-time of below 10 ${\mu}sec$ and reference spur suppression below -64 dBc.

• 대한전자공학회논문지SD
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• 제47권11호
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• pp.65-71
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• 2010

본 논문에서는 3.1~10.6 GHz 대역에서 14개 LO 신호를 발생하는 MB-OFDM UWB 시스템용 LO 생성 회로에 대한 새로운 구조를 제안한다. 제안하는 LO 생성 회로는 저전력 설계를 위해 하나의 PLL을 사용하면서 주파수 합성과정에서 반드시 필요로 하는 비선형 회로의 숫자를 최소화하고, 동시에 주파수 합성과정에서 발생되는 주요 spurious를 UWB 대역 밖에 존재시킴으로서 spurious 문제를 보다 근본적으로 해결하였다. 제안하는 LO 생성 회로는 $0.13-{\mu}m$ CMOS 공정으로 설계 되었으며, 1.5 V의 공급전압으로부터 93~103 mW의 전력을 소모한다. 모의실험 결과, 모든 14개의 LO 신호 스펙트럼에서 최소 41 dBc 이상의 in-band spurious suppression과 3 nsec 이하의 밴드간 스위칭 시간을 갖는다.