• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.9
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• pp.63-73
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• 2015

This work proposes a 2-channel time-interleaved (T-I) 10b 120MS/s pipeline SAR ADC minimizing offset mismatch between channels without any calibration scheme. The proposed ADC employs a 2-channel SAR and T-I topology based on a 2-step pipeline ADC with 4b and 7b in the first and second stage for high conversion rate and low power consumption. Analog circuits such as comparator and residue amplifier are shared between channels to minimize power consumption, chip area, and offset mismatch which limits the ADC linearity in the conventional T-I architecture, without any calibration scheme. The TSPC D flip-flop with a short propagation delay and a small number of transistors is used in the SAR logic instead of the conventional static D flip-flop to achieve high-speed SAR operation as well as low power consumption and chip area. Three separate reference voltage drivers for 4b SAR, 7b SAR circuits and a single residue amplifier prevent undesirable disturbance among the reference voltages due to each different switching operation and minimize gain mismatch between channels. High-frequency clocks with a controllable duty cycle are generated on chip to eliminate the need of external complicated high-frequency clocks for SAR operation. The prototype ADC in a 45nm CMOS technology demonstrates a measured DNL and INL within 0.69LSB and 0.77LSB, with a maximum SNDR and SFDR of 50.9dB and 59.7dB at 120MS/s, respectively. The proposed ADC occupies an active die area of 0.36mm2 and consumes 8.8mW at a 1.1V supply voltage.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.27-35
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• 2008

This work proposes a 14b 150MS/s 0.13um CMOS ADC for SDR systems requiring simultaneously high resolution, low power, and small size at high speed. The proposed ADC employs a calibration-free four-step pipeline architecture optimizing the scaling factor for the input trans-conductance of amplifiers and the sampling capacitance in each stage to minimize thermal noise effects and power consumption at the target resolution and sampling rate. A signal- insensitive 3-D fully symmetric layout achieves a 14b level resolution by reducing a capacitor mismatch of three MDACs. The proposed supply- and temperature- insensitive current and voltage references with on-chip RC filters minimizing the effect of switching noise are implemented with off-chip C filters. The prototype ADC in a 0.13um 1P8M CMOS technology demonstrates a measured DNL and INL within 0.81LSB and 2.83LSB, at 14b, respectively. The ADC shows a maximum SNDR of 64dB and 61dB and a maximum SFDR of 71dB and 70dB at 120MS/s and 150MS/s, respectively. The ADC with an active die area of $2.0mm^2$ consumes 140mW at 150MS/s and 1.2V.

• Journal of the Korean Society for Nondestructive Testing
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• v.22 no.4
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• pp.361-368
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• 2002

The aim of this study was to investigate the effect of preprocessing the transmitted energy spectrum data on development of a robust model to predict the sugar content in intact apples. The spectrum data were measured from 120 Fuji apple samples conveying at the speed of 2 apples per second. Computer algorithms of preprocessing methods such as MSC, SNV, first derivative, OSC and their combinations were developed and applied to the raw spectrum data set. The results indicated that correlation coefficients between the transmitted energy values at each wavelength and sugar contents of apples were significantly improved by the preprocessing of MSC and SNV in particular as compared with those of no-preprocessing. SEPs of the prediction models showed great difference depending on the preprocessing method of the raw spectrum data, the largest of 1.265%brix and the smallest of 0.507% brix. Such a result means that an appropriate preprocessing method corresponding to the characteristics of the spectrum data set should be found or developed for minimizing the prediction errors. It was observed that MSC and SNV are closely related to prediction accuracy, OSC is to number of PLS factors and the first derivative resulted in decrease of the prediction accuracy. A robust calibration model could be d3eveloped by the combined preprocessing of MSC and OSC, which showed that SEP=0.507%brix, bias=0.0327 and R2=0.8823.

• Journal of Korean Society of Transportation
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• v.25 no.6
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• pp.99-109
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• 2007

There have been few studies on the impacts of independent recurrent and non-recurrent congestion on freeway networks. The main reason is due partly to the lack of traffic data collected during those periods of recurrent and non-recurrent congestion and partly to the difficulty of using the simulation tools effectively. This study has suggested a methodology to analyze the independent impacts of the recurrent and non-recurrent congestion on target freeway segments. The proposed methodology is based on an elaborately calibrated simulation analysis, using real traffic data obtained during the recurrent and non-recurrent congestion periods. This paper has also summarized the evaluation results from the field tests of two ITS technologies, which were developed to provide drivers with real-time traffic information under traffic congestion. As a result, their accuracy may not be guaranteed during the transition periods such as the non-recurrent congestion. In summary, this study has been focused on the importance of non-recurrent congestion compared to recurrent congestion, and the proposed methodology is expected to provide a basic foundation for prioritizing limited government investments for improving freeway network performance degraded by recurrent or non-recurrent congestion.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.1
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• pp.14-21
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• 2011

A 10b 500MS/s $0.13{\mu}m$ CMOS ADC is proposed for 4G wireless communication systems such as a LTE-Advanced and SDR The ADC employs a calibration-free single-channel folding architecture for low power consumption and high speed conversion rate. In order to overcome the disadvantage of high folding rate, at the fine 7b ADC, a cascaded folding-interpolating technique is proposed. Further, a folding amplifier with the folded cascode output stage is also discussed in the block of folding bus, to improve the bandwidth limitation and voltage gain by parasitic capacitances. The chip has been fabricated with $0.13{\mu}m$ 1P6M CMOS technology, the effective chip area is $1.5mm^2$. The measured results of INL and DNL are within 2.95LSB and l.24LSB at 10b resolution, respectively. The SNDR is 54.8dB and SFDR is 63.4dBc when the input frequency is 9.27MHz at sampling frequency of 500MHz. The ADC consumes 150mW($300{\mu}W/MS/s$) including peripheral circuits at 500MS/s and 1.2V(1.5V) power supply.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.2430-2434
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• 2005

Automatic FPC punching instrument for the improvement of working condition and cost saving is introduced in this paper. FPC(flexible printed circuit) is used to detect the contact position of K/B and button like a cellular phone. Depending on the quality of the printed ink and position of reference punching point to the FPC, the resistance and current are varied to the malfunctioning values. The size of reference punching point is 2mm and the above. Because the punching operation is done manually, the accuracy of the punching degree is varied with operator's condition. Recently, The punching accuracy has deteriorated severely to the 2mm punching reference hall so that assembly of the K/B has hardly done. To improve this manual punching operation to the FPC, automatic FPC punching system is introduced. Precise mechanical parts like a 5-step stepping motor and ball screw mechanism are designed and tested and low cost PC camera is used for the sake of cost down instead of using high quality vision systems for the FA. 3D Mechanical design tool(Pro/E) is used to manage the exact tolerance circumstances and avoid design failures. Simulation is performed to make the complete vision based punching machine before assembly, and this procedure led to the manufacturing cost saving. As the image processing algorithms, dilation, erosion, and threshold calculation is applied to obtain an exact center position from the FPC print marks. These image processing algorithms made the original images having various noises have clean binary pixels which is easy to calculate the center position of print marks. Moment and Least square method are used to calculate the center position of objects. In this development circumstance, Moment method was superior to the Least square one at the calculation of speed and against noise. Main control panel is programmed by Visual C++ and graphical Active X for the whole management of vision based automatic punching machine. Operating modes like manual, calibration, and automatic mode are added to the main control panel for the compensation of bad FPC print conditions and mechanical tolerance occurring in the case of punch and die reassembly. Test algorithms and programs showed good results to the designed automatic punching system and led to the increase of productivity and huge cost down to law material like FPC by avoiding bad quality.

• Journal of the Korea Convergence Society
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• v.8 no.11
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• pp.49-56
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• 2017

Curling sweeping is one of important motion to control the position of the curling stone, and sweeping speed and applied force to the broom pad are major research subjects. In this study, a device was developed to measure the force applied to the curling broom pad in curling sweeping motion, and two load cells were mounted between the broom pad and pad holder. Analog signals generated from the load cells were sampled about 300 times per second using a micro controller, and then converted to 10-bit digital signals. Calibration of the load cell and set up of regression equations to convert the measured electrical signals into mass (force) was done by three M1 class weights, and the developed system was designed as wearable device to minimize increasing of total weight of the broom. Same force was applied to the developed system and a force plate that was using as a reference force measurement system in field of sports, and the difference between the measured values were showed about $0.909{\pm}1.375N$(mean and standard deviation). The developed system could be applied other kinds of study which required force measurement function similar to sweeping motion.

• Journal of the Korean Chemical Society
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• v.56 no.5
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• pp.583-590
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• 2012

The HF (Hollow fiber) extraction method was optimized to analysis seven species of pesticides in aqueous sample and analyzing samples by GC/MS. Hollow fiber extraction showed good efficiency when it was conducted under these conditions: organic solvent was toluene and agitation speed was 1200 rpm. The 15% concentration of NaCl was optimized when it was experimented between 5% and 25%. The equilibrium time was determined at 15 minutes. The pH 5 showed the best effect on the extraction efficiency. The linearities of calibration curves of seven species were good with correlation of regression ($r^2$) over 0.995 when they were experimented over a concentration range of $5{\mu}g/L$ to $50{\mu}g/L$. The analytical data exhibited the detection of limits (LODs) range of $0.37{\mu}g/L$ to $1.23{\mu}g/L$ and the limit of quantification (LOQs) range of $1.19{\mu}g/L$ to $3.91{\mu}g/L$. The optimized HF-LPME extraction method provides a simple and effective preparation and requires small amount of organic solvents and samples compared to conventional pre-treatment methods.

• Journal of the Korean Chemical Society
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• v.58 no.6
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• pp.535-542
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• 2014

A simple and efficient preconcentration method was developed using three-phase liquid phase microextraction prior to HPLC-UV for simultaneous extraction and determination of tetracycline antibiotics (tetracycline, oxytetracycline, and chlortetracycline). The tetracycline antibiotics were separated simultaneously on a column ($C_8$, $3.0{\times}150mm$, $3{\mu}m$) with high selectivity and sensitivity using gradient elution. Under optimized conditions (extraction solvent, heptanal; pH of donor, 9.0; pH of acceptor, 1.0; stirring speed, 700 rpm; NaCl salt, 0%; and extraction time, 60 min), enrichment factors (EF) were between 5.6 and 22.3. The limit of detection (LOD) and limit of quantitation (LOQ) in the spiked urine matrix were in the concentration range of $0.08{\sim}0.8{\mu}g/mL$ and $0.4{\sim}1.6{\mu}g/mL$, respectively. The calibration curves were linear within the range of $0.1{\sim}32{\mu}g/mL$ with the square of the correlation coefficient being more than 0.995. The precision (as a relative standard deviation, RSD) and accuracy (as a relative recovery) within working range were 1.3~9.1% and 84~118%, respectively.

• Journal of Korea Water Resources Association
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• v.33 no.4
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• pp.471-482
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• 2000

Surface energy balance components were evaluated by Landsat TM data and GIS with meteorological data. Calibration and validation for the applicability of this methodology were made through the estimating of the large-scale evapotranspiration (ET). In addition, sensitivity and error analysis was conducted to see the effects of the surface energy balance components on ET and the accuracy of each components. Bochong-chon located on the upper part of Guem River basin was selected as the case study area. Spatial distribution map of ET were produced for five dates: Jan. 1, Apr. 3, May. 10, and Nov. 27, 1995. The study results showed tat ET was greatly varied with the aspect and theland use type on the surface. In the case of having northeast and southeast in the aspect, ET was linearly increased depending on growing net radiation. While surface temperature has a high value, NDVI(Normalized Difference Vegetation Index) has a low value in the vegetated area. Therefore, ground heat flux was increased but ET was relatively decreased. The results of sensitivity and error analysis showed that net radiation is most sensitive and effective, ranging from 12.5% to 23.6% of sensitivity. Furthermore, the surface temperature, air temperature, and wind speed have the significant effects on ET estimation using remotely sensed data.