• Title/Summary/Keyword: Speech processor

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Implementation of a 4-Channerl ADPCM CODEC Using a DSP (DSP를 사용한 4채널용 ADPCM CODEC의 실시간 구현에 관한 연구)

  • Lee, Ui-Taek;Lee, Gang-Seok;Lee, Sang-Uk
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.22 no.5
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    • pp.29-38
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    • 1985
  • In this paper we have designed and implemented in real time a simple, efficient and flexible AOPCM cosec using a high speed digital processor, NEC 7720. For ADPCM system, we have used an instantaneous adaptive quantizer and a first-order fixed predictor. The software for NEC 7720 has been developed and it was found that the NEC 7720 was capable of performing the entire ADPCAt algorithm for 4 channels in real time as optimizing the program. Computer simulation has born made to investigate a computational accuracr of NEC 7720 and to de-termine necessary parameters for a ADPCM codec. Real telephone speech, RC-shaped Gaussian noise and 1004 Hz tone signal were used for simulation. In simulation, the parameters werc optimized from the computed SNR and the informal listening test. The developed software was tested in real time operation using a hardware emulator for NEC 7720. It took a maximum 23.25$\mu$s to encode one sample and 113.5$\mu$s, including all the necessary 1/0 operations, to encode 4 channels. In the case of decoding process, it took 24.75$\mu$s to decode one sample and 119.5$\mu$s to decode 4 channels.

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A Study on the realization of the right to be forgotten on social normative context: focusing on comparison of Korea-US-EU and the legal, technical, and service market (사회규범적 맥락에서 본 잊혀질 권리의 다차원적 실현범위 연구: 한-미-EU 비교 및 법제, 기술, 서비스 시장의 비교를 중심으로)

  • Shim, Mina
    • Journal of Convergence for Information Technology
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    • v.8 no.2
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    • pp.141-148
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    • 2018
  • The purpose of this paper is to explore the scope of realization of multiple perspectives so that the implementation of the right to be forgotten is more realistic than the ideal information deletion concept. We examined domestic and foreign legal system and technology/service trends, and reflected the classification realization level of service realization, processing type and information characteristics of personal information processor, and legislative/technical factors for multi-level scope analysis. As a result, we have presented a matrix of the range of realization of the right to be forgotten and the scope of diversified regulation by the subject of protection. This study will be extended to the convergence of law and engineering, and will contribute to the prediction of social costs and expansion of the market by identifying the scope of 'deletion rights'.

Implementation of Adaptive Multi Rate (AMR) Vocoder for the Asynchronous IMT-2000 Mobile ASIC (IMT-2000 비동기식 단말기용 ASIC을 위한 적응형 다중 비트율 (AMR) 보코더의 구현)

  • 변경진;최민석;한민수;김경수
    • The Journal of the Acoustical Society of Korea
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    • v.20 no.1
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    • pp.56-61
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    • 2001
  • This paper presents the real-time implementation of an AMR (Adaptive Multi Rate) vocoder which is included in the asynchronous International Mobile Telecommunication (IMT)-2000 mobile ASIC. The implemented AMR vocoder is a multi-rate coder with 8 modes operating at bit rates from 12.2kbps down to 4.75kbps. Not only the encoder and the decoder as basic functions of the vocoder are implemented, but VAD (Voice Activity Detection), SCR (Source Controlled Rate) operation and frame structuring blocks for the system interface are also implemented in this vocoder. The DSP for AMR vocoder implementation is a 16bit fixed-point DSP which is based on the TeakLite core and consists of memory block, serial interface block, register files for the parallel interface with CPU, and interrupt control logic. Through the implementation, we reduce the maximum operating complexity to 24MIPS by efficiently managing the memory structure. The AMR vocoder is verified throughout all the test vectors provided by 3GPP, and stable operation in the real-time testing board is also proved.

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Design of a Low Power Digital Filter Using Variable Canonic Signed Digit Coefficients (가변 CSD 계수를 이용한 저전력 디지털 필터의 설계)

  • Kim, Yeong-U;Yu, Jae-Taek;Kim, Su-Won
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.7
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    • pp.455-463
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    • 2001
  • In this Paper, an approximate processing method is proposed and tested. The proposed method uses variable CSD (VCSD) coefficients which approximate filter stopband attenuation by controlling the precision of the CSD coefficient sets. A decimation filter for Audio Codec '97 specifications has been designed having processor architecture that consists of program/data memory, arithmetic unit, energy/level decision, and sinc filter blocks, and fabricated with 0.6${\mu}{\textrm}{m}$ CMOS sea-of-gate technology. For the combined two halfband FIR filters in decimation filter, the number of addition operations were reduced to 63.5%, 35.7%, and 13.9%, compared to worst-case which is not an adaptive one. Experimental results show that the total power reduction rate of the filter is varying from 3.8 % to 9.0 % with respect to worst-case. The proposed approximate processing method using variable CSD coefficients is readily applicable to various kinds of filters and suitable, especially, for the speech and audio applications, like oversampling ADCs and DACs, filter banks, voice/audio codecs, etc.

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