• Journal of information and communication convergence engineering
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• v.17 no.1
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• pp.1-7
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• 2019

In this paper, we present the block diagonalization (BD) algorithm for the multiple-user multiple input multiple output (MU-MIMO) $4{\times}4$ system using specific purpose processor (SPP) hardware. Our objective is to improve the single-user MIMO (SU-MIMO) system using the MU-MIMO technology, which is remarkably fast and allows more users to connect simultaneously. To that end, our MU-MIMO precoder uses the BD algorithm to ensure signal integrity when connecting multiple users; but remains accurate and stable. However, a precoder that uses the BD algorithm is computationally complex; therefore, we use an SPP with special functions designed to compute the BD algorithm. The implementation test results show that our SPP computes the BD algorithm faster than the software solution.

• 제어로봇시스템학회:학술대회논문집
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• 1986.10a
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• pp.544-546
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• 1986

In this report, we have designed a Flexible Manufacturing System(FMS) for Engine-Cylinder block that is composed of maching center, special purpose machine, AGV(Automatic Guided Vehicle), using Micro-Computer and Programmable Controller(PC). From this report, we mostly present hardware features and scheduling software.

• The Journal of the Korea Contents Association
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• v.13 no.5
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• pp.408-419
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• 2013

The terminals of e-Book(electronic Book) are classified into two types which consist of special-purpose terminal equipment and general-purpose terminal equipment. Although the terminal products inr the two types have had a strong race in the e-Book market each other, both enterprises and consumers want the two type to remain persistently with competition in good faith. Therefore, it is necessary for each type camps to find blue ocean by establishing differentiation strategies of each type. In this paper, we designed the research model that independent variables consist of hardware quality and software quality, dependent variable is user satisfaction, moderator variable is the terminal type. Through the research model, we investigated factors having a influence on the user satisfaction of the e-Book terminal that consists of hardware and software. In particular, we investigated if the degree of the influence is different between the two types. As a result, we got conclusions as followings. First, the quality of hardware and software in the terminal had significant influences on the user satisfaction. Second, the degree which the hardware quality has influenced user satisfaction was not different between the two types, but the degree which the software quality has influence on user satisfaction was different between the two types. As a implication of this result, we found that special-purpose terminal provider need to establish a strategies for raising the quality of e-Book viewer to provide different product from general-purpose terminal.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1992.04a
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• pp.127-132
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• 1992

To relize the future intelligent robot the development of a special-purpose processor for a coordinate transformation is evidently challenging task. In this case the complexity of a hardware architecture strongly depends on the adopted algorithm. In this paper we have used an inverse kinemetics algorithm based on incremental unit computation method. This method considers the 3-axis articulated robot as the combination of two types of a 2-axis robot: polar robot and 2-axis planar articulated one. For each robot incremental units in the joint and Cartesian spaces are defined. With this approach the calculation of the inverse Jacobian matrix can be realized through a simple combinational logic gate. Futhermore, the incremental computation of the DDA integrator can be used to solve the direct kinematics. We have also designed a hardware architecture to implement the proposed algorithm. The architecture consists of serveral simple unitsl. The operative unit comprises several basic operators and simple data path with a small bit-length. The hardware architecture is realized byusing the EPLD. For the straight-line motion of the KAIST arm we have obtained maximum end effector's speed of 12.6 m/sec by adopting system clock of 8 MHz.

• Journal of Biosystems Engineering
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• v.37 no.3
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• pp.148-154
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• 2012

Purpose: In order to improve road-friendliness of heavy vehicles, a fuzzy hybrid control strategy consisting of a hybrid control strategy and a fuzzy logic control module is proposed. The performance of the proposed strategy should be effectively evaluated using a hardware-in-the-loop (HIL) simulation model of a semi-active suspension system based on the fuzzy hybrid control strategy prior to real vehicle implementations. Methods: A hardware-in-the-loop (HIL) simulation system was synthesized by utilizing a self-developed electronic control unit (ECU), a PCI-1711 multi-functional data acquisition board as well as the previously developed quarter-car simulation model. Road-friendliness of a semi-active suspension system controlled by the proposed control strategy was simulated via the HIL system using Dynamic Load Coefficient (DLC) and Dynamic Load Stress Factor (DLSF) criteria. Results: Compared to a passive suspension, a semi-active suspension system based on the fuzzy hybrid control strategy reduced the DLC and DLSF values. Conclusions: The proposed control strategy of semi-active suspension systems can be employed to improve road-friendliness of road vehicles.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.14 no.6
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• pp.79-89
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• 2004

Fingerprint identification consists of user enrollment phase storing user's fingerprint in a database and user identification phase making a candidate list for a given fingerprint. straightforward approach to perform the user identification phase is to scan the entire database sequentially, and takes times for large-scale databases. In this paper, we develop a hardware design which can perform the user identification phase in real-time. Our design employs parallel processing techniques and has been implemented on a PCI-based platform containing an FPGA and SDRAMs. Based on the performance evaluation, our hardware implementation can provide a scalability and perform the fingerprint identification in real-time.

• 제어로봇시스템학회:학술대회논문집
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• 2001.10a
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• pp.152.4-152
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• 2001

We investigate, in this paper, the use of FPGA(Field Programmable Gate Array) architectures for real-time processing of digital linescan camera. The use of FPGAS for low-level processing represents an excellent tradeoff between software and special purpose hardware implementations. A library of modules that implement common low-level machine vision operations is presented. These modules are designed with gate-level hardware components that are compiled into the functionality of the FPGA chips. This new synchronous unidirectional interface establishes a protocol for the transfer of image and result data between modules. This reduces the design complexity and allows several different low-level operations to be applied to the same input image ...

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2000.12a
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• pp.169-172
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• 2000

Direct volume rendering has yet been restricted to high-end graphic workstations and special-purpose hardware, due to the large amount of trilinear interpolation, that are necessary to obtain high image quality. In this paper, we implemented the volume rendering techniques using the 2D-texture at the environment of standard PC hardware. In addition, we show how multi-texturing capabilities of modern PC graphics board are enable to volume rendering. Besides using extended OpenGL function, we improved pixel operations and rendering capacity.

• Design & Manufacturing
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• v.16 no.3
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• pp.34-38
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• 2022

Regular expression pattern matching is widely used in applications such as computer virus vaccine, NIDS and DNA sequencing analysis. Hardware-based pattern matching is used when high-performance processing is required due to time constraints. ReCPU, SMPU, and REMP, which are processor-based regular expression matching processors, have been proposed to solve the problem of the hardware-based method that requires resynthesis whenever a pattern is updated. However, these processor-based regular expression matching processors inefficiently handle repetitive operations of regular expressions. In this paper, we propose a new instruction set to improve the inefficient repetitive operations of ReCPU and SMPU. We propose REMPi, a regular expression matching processor that enables efficient iterative operations based on the REMP instruction set. REMPi improves the inefficient method of processing a particularly short sub-pattern as a repeat operation OR, and enables processing with a single instruction. In addition, by using a down counter and a counter stack, nested iterative operations are also efficiently processed. REMPi was described with Verilog and synthesized on Intel Stratix IV FPGA.

• Journal of the Institute of Convergence Signal Processing
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• v.13 no.2
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• pp.83-90
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• 2012

In this paper, an intelligent visual surveillance system based on a NIOS II embedded platform is implemented. By this time, embedded based visual surveillance systems were restricted for a special purpose because of high dependence upon hardware. In order to improve the restriction, we implement a flexible embedded platform, which is available for various purpose of applications. For high speed processing of software based programming, we improved performance of the system which is integrated the SOPC type of NIOS II embedded processor and image processing algorithms by using software programming and C2H(The Altera NIOS II C-To-Hardware(C2H) Acceleration Compiler) compiler in the core of the hardware platform. Then, we constructed a server system which globally manage some devices by the NIOS II embedded processor platform, and included the control function on networks to increase efficiency for user. We tested and evaluated our system at the designated region for visual surveillance.