• Title/Summary/Keyword: Solder Bonding

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Highly Reliable Solder ACFs FOB (Flex-on-Board) Interconnection Using Ultrasonic Bonding

  • Kim, Yoo-Sun;Zhang, Shuye;Paik, Kyung-Wook
    • Journal of the Microelectronics and Packaging Society
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    • v.22 no.1
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    • pp.35-41
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    • 2015
  • In this study, in order to improve the reliability of ACF interconnections, solder ACF joints were investigated interms of solder joint morphology and solder wetting areas, and evaluated the electrical properties of Flex-on-Board (FOB) interconncections. Solder ACF joints with the ultrasonic bonding method showed excellent solder wetting by broken solder oxide layers on solder surfaces compared with solder joints with remaining solder oxide layer bonded by the conventional thermo-compression (TC) bonding method. When higher target temperature was used, Sn58Bi solder joints showed concave shape due to lower degree of cure of resin at solder MP by higher heating rate. ACFs with epoxy resins and SAC305 solders showed lower degree of resin cure at solder MP due to the slow curing rate resulting in concave shaped solder joints. In terms of solder wetting area, solder ACFs with $25-32{\mu}m$ diameters and 30-40 wt% showed highest wetted solder areas. Solder ACF joints with the concave shape and the highest wetting area showed lower contact resistances and higher reliability in PCT results than conventional ACF joints. These results indicate that solder morphologies and wetting areas of solder ACF joints can be controlled by adjustment of bonding conditions and material properties of solder and polymer resin to improve reliability of ACF joints.

Low Temperature bonding Technology for Electronic Packaging (150℃이하 저온에서의 미세 접합 기술)

  • Kim, Sun-Chul;Kim, Youngh-Ho
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.1
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    • pp.17-24
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    • 2012
  • Recently, flip chip interconnection has been increasingly used in microelectronic assemblies. The common Flip chip interconnection is formed by reflow of the solder bumps. Lead-Tin solders and Tin-based solders are most widely used for the solder bump materials. However, the flip chip interconnection using these solder materials cannot be applied to temperature-sensitive components since solder reflow is performed at relatively high temperature. Therefore the development of low temperature bonding technologies is required in these applications. A few bonding techniques at low temperature of $150^{\circ}C$ or below have been reported. They include the reflow soldering using low melting point solder bumps, the transient liquid phase bonding by inter-diffusion between two solders, and the bonding using low temperature curable adhesive. This paper reviews various low temperature bonding methods.

Epoxy solder paste and its applications (에폭시 솔더 페이스트 소재와 적용)

  • Moon, Jong-Tae;Eom, Yong-Sung;Lee, Jong-Hyun
    • Journal of Welding and Joining
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    • v.33 no.3
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    • pp.32-39
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    • 2015
  • With the simplicity of process and high reliability in chip or package bonding, epoxy solder paste (ESP) has been recently considered as a competitive bonding material. The ESP material is composed of solder powder and epoxy formulation which can remove oxide layers on the surface of solder powder and pad finish metal. The bonding formed using ESP shows outstanding bonding strength and suppresses electrical short between adjacent pads or leads owing to the reinforced structure by cured epoxy after the bonding. ESP is also expected to suppress the formation and growth of whisker on the pads or leads. With the mentioned advantages, ESP is anticipated to become a spotlighted bonding material in the assembly of flexible electronics and electronic modules in automotive vehicles.

Evaluation of Bonding Properties of Epoxy Solder Joints by High Temperature Aging Test (고온 시효 시험에 따른 Epoxy 솔더 접합부의 접합 특성 평가)

  • Kang, Min-Soo;Kim, Do-Seok;Shin, Young-Eui
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.32 no.1
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    • pp.6-12
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    • 2019
  • Bonding properties of epoxy-containing solder joints were investigated by a high temperature aging test. Specimens were prepared by bonding an R3216 standard chip resistor to an OSP-finished PCB by a reflow process with two basic types of solder (SAC305 & Sn58Bi) pastes and two epoxy-solder (SAC305+epoxy & Sn58Bi+epoxy) pastes. In all epoxy solder joints, an epoxy fillet was formed in the hardened epoxy, lying around the outer edge of the solder joint, between the chip and the Cu pad. In order to analyze the bonding characteristics of solder joints at high temperatures, a high-temperature aging test at $150^{\circ}C$ was carried out for 14 days (336 h). After aging, the intermetallic compound $Cu_6Sn_5$ was found to have formed in the solder joint on the Cu pad, and the shear stress on the conventional solder joint was reduced by a significant amount. The reason that the shear force did not decrease much, even though in epoxy solder, was thatbecause epoxy hardened at the outer edge of the supported solder joints. Using epoxy solder, strong bonding behavior can be ensured due to this resistance to shear force, even in metallurgical changes such as those where intermetallic compounds form at solder joints.

Interconnection Technology Based on InSn Solder for Flexible Display Applications

  • Choi, Kwang-Seong;Lee, Haksun;Bae, Hyun-Cheol;Eom, Yong-Sung;Lee, Jin Ho
    • ETRI Journal
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    • v.37 no.2
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    • pp.387-394
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    • 2015
  • A novel interconnection technology based on a 52InSn solder was developed for flexible display applications. The display industry is currently trying to develop a flexible display, and one of the crucial technologies for the implementation of a flexible display is to reduce the bonding process temperature to less than $150^{\circ}C$. InSn solder interconnection technology is proposed herein to reduce the electrical contact resistance and concurrently achieve a process temperature of less than $150^{\circ}C$. A solder bump maker (SBM) and fluxing underfill were developed for these purposes. SBM is a novel bumping material, and it is a mixture of a resin system and InSn solder powder. A maskless screen printing process was also developed using an SBM to reduce the cost of the bumping process. Fluxing underfill plays the role of a flux and an underfill concurrently to simplify the bonding process compared to a conventional flip-chip bonding using a capillary underfill material. Using an SBM and fluxing underfill, a $20{\mu}m$ pitch InSn solder SoP array on a glass substrate was successfully formed using a maskless screen printing process, and two glass substrates were bonded at $130^{\circ}C$.

Study on Joint of Micro Solder Bump for Application of Flexible Electronics (플렉시블 전자기기 응용을 위한 미세 솔더 범프 접합부에 관한 연구)

  • Ko, Yong-Ho;Kim, Min-Su;Kim, Taek-Soo;Bang, Jung-Hwan;Lee, Chang-Woo
    • Journal of Welding and Joining
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    • v.31 no.3
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    • pp.4-10
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    • 2013
  • In electronic industry, the trend of future electronics will be flexible, bendable, wearable electronics. Until now, there is few study on bonding technology and reliability of bonding joint between chip with micro solder bump and flexible substrate. In this study, we investigated joint properties of Si chip with eutectic Sn-58Bi solder bump on Cu pillar bump bonded on flexible substrate finished with ENIG by flip chip process. After flip chip bonding, we observed microstructure of bump joint by SEM and then evaluated properties of bump joint by die shear test, thermal shock test, and bending test. After thermal shock test, we observed that crack initiated between $Cu_6Sn_5IMC$ and Sn-Bi solder and then propagated within Sn-Bi solder and/or interface between IMC and solder. On the other hands, We observed that fracture propated at interface between Ni3Sn4 IMC and solder and/or in solder matrix after bending test.

Effect of Plasma Treatment on the Bond Strength of Sn-Pb Eutectic Solder Flip Chip (Sn-Pb 공정솔더 플립칩의 접합강도에 미치는 플라즈마 처리 효과)

  • 홍순민;강춘식;정재필
    • Journal of Welding and Joining
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    • v.20 no.4
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    • pp.498-504
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    • 2002
  • Fluxless flip chip bonding process using plasma treatment instead of flux was investigated. The effect of plasma process parameters on tin-oxide etching characteristics were estimated with Auger depth profile analysis. The die shear test was performed to evaluate the adhesion strength of the flip chip bonded after plasma treatment. The thickness of oxide layer on tin surface was reduced after Ar+H2 plasma treatment. The addition of H2 improved the oxide etching characteristics by plasma. The die shear strength of the plasma-treated Sn-Pb solder flip chip was higher than that of non-treated one but lower than that of fluxed one. The difference of the strength between plasma-treated specimen and non-treated one increased with increase in bonding temperature. The plasma-treated flip chip fractured at solder/TSM interface at low bonding temperature while the fracture occurred at solder/UBM interface at higher bonding temperature.

The Chip Bonding Technology on Flexible Substrate by Using Micro Lead-free Solder Bump (플렉서블 기반 미세 무연솔더 범프를 이용한 칩 접합 공정 기술)

  • Kim, Min-Su;Ko, Yong-Ho;Bang, Jung-Hwan;Lee, Chang-Woo
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.3
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    • pp.15-20
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    • 2012
  • In electronics industry, the coming electronic devices will be expected to be high integration and convergence electronics. And also, it will be expected that the coming electronics will be flexible, bendable and wearable electronics. Therefore, the demands and interests of bonding technology between flexible substrate and chip for mobile electronics, e-paper etc. have been increased because of weight and flexibility of flexible substrate. Considering fine pitch for high density and thermal damage of flexible substrate during bonding process, the micro solder bump technology for high density and low temperature bonding process for reducing thermal damage will be required. In this study, we researched on bonding technology of chip and flexible substrate by using 25um Cu pillar bumps and Sn-Bi solder bumps were formed by electroplating. From the our study, we suggest technology on Cu pillar bump formation, Sn-Bi solder bump formation, and bonding process of chip and flexible substrate for the coming electronics.

Effect of Sn Decorated MWCNT Particle on Microstructures and Bonding Strengths of the OSP Surface Finished FR-4 Components Assembled with Sn58%Bi Composite Solder Joints (OSP 표면처리된 FR-4 PCB기판과 Sn58%Bi 복합솔더 접합부의 미세조직 및 접합강도에 미치는 Sn-MWCNT의 영향)

  • Park, Hyun-Joon;Lee, Choong-Jae;Min, Kyung Deuk;Jung, Seung-Boo
    • Journal of the Microelectronics and Packaging Society
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    • v.26 no.4
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    • pp.163-169
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    • 2019
  • Sn-Pb solder alloys in electronics rapidly has been replaced to Pb free solder alloys because of various environmental regulations such as restriction of hazardous substances directive (RoHS), European Union waste electrical, waste electrical and electronic equipment (WEEE), registration evaluation authorization and of chemicals (REACH) etc. Because Sn58%Bi (in wt.%) solder alloy has low melting point and higher mechanical properties than that of Sn-Pb solder, it has been studied to manufacture electronic components. However, the reliability of Sn58%Bi solder could be lowered because of the brittleness of Bi element included in the solder alloy. Therefore, we observed the microstructures of Sn58%Bi composite solders with various contents of Sn-decorated multiwalled carbon nanotube (Sn-MWCNT) particles and evaluated bonding strength of the FR-4 components assembled with Sn58%Bi composite solder. Also, microstructures and bonding strengths of the Sn58%Bi composite solder joints were evaluated with the number of reflows from 1 to 7 times, respectively. Bonding strengths and fracture energies of the Sn58%Bi composite solder joints were measured by die shear test. Microstructures and fracture modes were observed with scanning electron microscope (SEM). Microstructures in the Sn58%Bi composite solder joints were finer than that of only Sn58%Bi solder joint. Bonding strength and fracture energy of Sn58%Bi composite solder including 0.1 wt.% of Sn-decorated MWCNT particles increased up to 20.4% and 15.4% at 5 times in reflow, respectively.

A novel wafer-level-packaging scheme using solder (쏠더를 이용한 웨이퍼 레벨 실장 기술)

  • 이은성;김운배;송인상;문창렬;김현철;전국진
    • Journal of the Semiconductor & Display Technology
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    • v.3 no.3
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    • pp.5-9
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    • 2004
  • A new wafer level packaging scheme is presented as an alternative to MEMS package. The proof-of-concept structure is fabricated and evaluated to confirm the feasibility of the idea for MEMS wafer level packaging. The scheme of this work is developed using an electroplated tin (Sn) solder. The critical difference over conventional ones is that wafers are laterally bonded by solder reflow after LEGO-like assembly. This lateral bonding scheme has merits basically in morphological insensitivity and its better bonding strength over conventional ones and also enables not only the hermetic sealing but also its electrical interconnection solving an open-circuit problem by notching through via-hole. The bonding strength of the lateral bonding is over 30 Mpa as evaluated under shear and the hermeticity of the encapsulation is 2.0$\times10^{-9}$mbar.$l$/sec as examined by pressurized Helium leak rate. Results show that the new scheme is feasible and could be an alternative method for high yield wafer level packaging.

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