• Title/Summary/Keyword: Small-signal circuit

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Modeling and Small-Signal Analysis of Controlled On-time Boost Power Factor Correction Circuit (도통 시간 제어형 승압형 역률보상회로의 모델링과 소신호 해석)

  • Park, Hyo-Gil;Hong, Seong-Su;Choe, Byeong-Jo
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.49 no.5
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    • pp.364-370
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    • 2000
  • A large-signal average model for the controlled on-time boost power factor correction(PFC) circuit is developed and subsequently linearized resulting in a small-signal model for the PFC circuit. Ac analyses are performed using the small-signal model, revealing new results new on small-signal dynamics of the PFC circuit. The analysis results and model predictions are confirmed with experimental measurements on 200W prototype PFC circuit.

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SMALL-SIGNAL MODEL FOR A CONTROLLED ON-TIME BOOST POWER FACTOR CORRECTION CIRCUIT

  • Kang, Yonghan;Choi, Byungcho
    • Proceedings of the KIPE Conference
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    • 1998.10a
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    • pp.642-647
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    • 1998
  • A new small-signal model for the controlled on-time boost power factor correction (PFC) circuit is presented. The proposed small-signal model is valid up to high frequencies over lKHz. The model can be used in designing the voltage feedback compensation of PFC circuits, the control bandwidth of which is maximized with auxiliary means of removing the low-frequency ripple from the output. The accuracy of the model is confirmed by a 200W experimental hardware

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An Accurate Small Signal Modeling of Cylindrical/Surrounded Gate MOSFET for High Frequency Applications

  • Ghosh, Pujarini;Haldar, Subhasis;Gupta, R.S.;Gupta, Mridula
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.12 no.4
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    • pp.377-387
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    • 2012
  • An intrinsic small signal equivalent circuit model of Cylindrical/Surrounded gate MOSFET is proposed. Admittance parameters of the device are extracted from circuit analysis and intrinsic circuit elements are presented in terms of real and imaginary parts of the admittance parameters. S parameters are then evaluated and justified with the simulated data extracted from 3D device simulation.

A study on the fabrication and the extraction of small signal equivalent circuit of power AlGaAs/GaAs HBTs (전력용 AlGaAs/GaAs HBT의 제작과 소신호 등가 회로 추출에 관한 연구)

  • 이제희;우효승;원태영
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.6
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    • pp.164-171
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    • 1996
  • We report the experimental resutls on AlGaAs/GaAs heterojunction bipolar transistors (HBTs) with carbon-doped base structure. To characterize the output power, load-pull mehtod was employed. By characterizing the devices with HP8510C, we extracted the small-signal equivalent circuit. The HBTs were fabricated employing wet mesa etching and lift-off process of ohmic metals. the implementation of polyimide into the fabriction process was accomplished to obtain the lower dielectric constant resultig in significant reduction of interconnect routing capacitance. The fabricated HBTs with an emitter area of 6${\times}14{\mu}m^{2}$ exhibited current gain of 45, BV$_{CEO}$ of 10V, cut-off frequency of 30GHz and power gain of 1 3dBm. To extract the small signal equivalent circuit, the de-embedded method was applied for parasitic parameters and the calculation of circuit equations for intrinsic parameters.

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A New Extraction Method of GaAs/InGaP HBT Small-signal Equivalent Circuit Model Parameters (GaAs/InGaP HBT 소신호 등가회로 모델 파라미터의 새로운 추출방법)

  • 이명규;윤경식
    • Proceedings of the IEEK Conference
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    • 2000.11a
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    • pp.357-360
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    • 2000
  • This paper describes a parameter extraction method for HBT(Heterojunction Bipolar Transistor) equivalent circuit model without measurements of special test structures or numerical optimizations. Instead, all equivalent circuit parameters are calculated analytically from small-signal S-parameters measured under different bias conditions. These values being extracted from the cutoff mode can be used to extract intrinsic parameters at the active mode. This method yields a deviation of about 1.3 % between the measured and modeled S-parameters.

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Small-Signal Model for Controlled On-Time Boost Power Factor Correction Circuit (연속-불연속 경계모드에서 동작하는 역률보상회로를 위한 소신호 모델)

  • Kang, Yong-Han;Seo, Bo-Hyeok
    • Proceedings of the KIEE Conference
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    • 1998.11a
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    • pp.141-143
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    • 1998
  • A new small-signal model for the controlled on-time boost Power factor correction (PFC) circuit is Presented. The proposed small-signal model is valid up to high frequencies ever 1kHz. IF to remove the low-frequency ripple from the output a 120Hz notch filter is used the proposed model can be used for the control design of the PFC circuit to improve the dynamics of the output voltage. The accuracy of the model is confirmed by comparing the experimental results with the simulational result.

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Analysis of Parameter Effects on the Small-Signal Dynamics of Buck Converters with Average Current Mode Control

  • Li, Ruqi;O'Brien, Tony;Lee, John;Beecroft, John;Hwang, Kenny
    • Journal of Power Electronics
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    • v.12 no.3
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    • pp.399-409
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    • 2012
  • In DC-DC Buck converters with average current mode control, the current loop compensator provides additional design freedom to enhance the converter current loop performance. On the other hand, the current loop circuit elements append substantial amount of complexity to not only the inner current loop but also the outer voltage loop, which makes it demanding to quantify circuit and operating parameter effects on the small-signal dynamics of such converters. Despite the difficulty, it is shown in this paper that parameter effects can be analyzed satisfactorily by using an existing small-signal model in conjunction with a newly proposed simplified alternative. As a result of the study, new insight into average current mode control is uncovered and discussed quantitatively. Measurable experimental results on a prototype averaged-current-mode-controlled Buck converter are provided to facilitate the analytical study with good correlation.

Small-Signal Analysis of a Differential Two-Stage Folded-Cascode CMOS Op Amp

  • Yu, Sang Dae
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.6
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    • pp.768-776
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    • 2014
  • Using a simplified high-frequency small-signal equivalent circuit model for BSIM3 MOSFET, the fully differential two-stage folded-cascode CMOS operational amplifier is analyzed to obtain its small-signal voltage transfer function. As a result, the expressions for dc gain, five zero frequencies, five pole frequencies, unity-gain frequency, and phase margin are derived for op amp design using design equations. Then the analysis result is verified through the comparison with Spice simulations of both a high speed op amp and a low power op amp designed for the $0.13{\mu}m$ CMOS process.

Development of Dipstick-Gage-Type Small Sensor Equipped with Individual Control Circuit for Detecting Engine Oil Deterioration (전용제어회로를 적용한 딥스틱게이지형 소형 엔진열화감지센서 개발)

  • Chun, Sang Myung
    • Tribology and Lubricants
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    • v.29 no.3
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    • pp.143-148
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    • 2013
  • In this study, several sensor parts used to obtain better signal stability are designed, a separate control circuit for the sensor is developed, and the results obtained using this control circuit are analyzed. The capacitances of the whole sensor system are measured using the control circuit connected to an improved flexible printed circuit board and an asymmetric dual sensor coated with a ceramic material. To realize good discrimination for a small change in the measured capacitance as the engine oil deteriorates, a commercial application-specific integrated circuit is installed on the control circuit as a capacitance-to-digital converter. The absolute error of a measured signal is found to be approximately ${\pm}4fF$.

Analyzing of CDTA using a New Small Signal Equivalent Circuit and Application of LP Filters (새로운 소신호 등가회로를 활용한 CDTA의 해석 및 저역통과 필터설계)

  • Bang, Junho;Song, Je-Ho;Lee, Woo-Choun
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.12
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    • pp.7287-7291
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    • 2014
  • A CDTA (current differencing transconductance amplifier) is an active building block for current mode analog signal processing with the advantages of high linearity and a wide frequency bandwidth. In addition, it can generate a stable voltage because all the differencing input current flows to the grounded devices. In this paper, a new small signal equivalent circuit is proposed to analyze a CDTA. The proposed small signal equivalent circuit provides greater precision in analyzing the magnitude and frequency response than its previous counterparts because it considers the parasitic components of the input, internal and output terminal. In addition, observations of the changes made in various devices, such as the resistor (Rz) confirmed that those devices heavily influence the characteristics of CDTA. The designed parameters of the proposed small signal equivalent circuit of the CDTA provides convenience and accuracy in the further design of analog integrated circuits. For verification purposes, a 2.5 MHz low pass filter was designed on the HSPICE simulation program using the proposed small signal equivalent circuit of CDTA.