• Journal of the Korean Society of Fisheries and Ocean Technology
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• v.42 no.1
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• pp.44-53
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• 2006

The expansion of near shore aquaculture is feasibility of moving aquaculture facilities into the open ocean. Numerical modeling technique using finite element method was used to enable the optimum design and evaluation of submersible aquaculture cage system. The characteristics of mooring loads response in mooring lines under waves and current and their response amplitude operators were calculated for single and three point mooring configuration at the surface condition and submerged one. The static mooring loads without wave and current loading were similar for both the surface and submerged configuration. It was calculated that three point mooring was more adequate than single point mooring for the mooring configuration of submersible aquaculture cage system. The wave induced response amplitude operators for the single point mooring configuration with the influence of currents were identical to those without the influence of currents.

• Proceedings of the KSME Conference
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• 2004.04a
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• pp.468-473
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• 2004

New reliability-based topology optimization method is proposed by utilizing single-loop single vector approach, which approximate searching the most probable point in the probabilistic design domain analytically, to reduce the time cost and dealing with several constraints to handle practical design requirements. To examine uncertainties in the topology design of a structure, the modulus of elasticity of the material and applied loadings are considered as probabilistic design variables. The results of design examples show that the proposed method provides efficiency curtailing the time for the optimization process and accuracy satisfying the specified reliability.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.5
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• pp.65-73
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• 2002

In this paper, we propose and verify an implementation method for a single-chip 2048 complex point FFT/IFFT in terms of sequential data processing. For the sequential processing of 2048 complex data, buffers to store the input data are necessary. Therefore, DRAM-like pipelined commutator architecture is used as a buffer. The proposed structure brings about the 60% chip size reduction compared with conventional approach by using this design method. The 16-point FFT is a basic building block of the entire FFT chip, and the 2048-point FFT consists of the cascaded blocks with five stages of radix-4 and one stage of radix-2. Since each stage requires rounding of the resulting bits while maintaining the proper S/N ratio, the convergent block floating point (CBFP) algorithm is used for the effective internal bit rounding and their method contributed to a single chip design of digital audio broadcasting system.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.10 s.340
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• pp.55-64
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• 2005

In this paper, we designed floating point units to accelate real-time 3D Graphics for Geometry processing. Designed floating point units support IEEE-754 single precision format and we confirmed 100 MHz performance of floating point add/mul unit, 120 MHz performance of floating point NR inverse division unit, 200 MHz performance of floating point power unit, 120 MHz performance of floating point inverse square root unit at Xilinx-vertex2. Also, using floating point units, designed Geometry processor and confirmed 3D Graphics data processing.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.3
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• pp.570-576
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• 2004

In this paper, we design the IFFT/FFT (Inverse fast Fourier Transform/Fast Fourier Transform) modules for IEEE 802.11a-1999, which is a standard of the High-speed Wireless LAN using the OFDM (Orthogonal Frequency Division Multiplexing). The designed IFFT/FFT is the 64-point FFT to be compatible with IEEE 802.11a and the pipelined architecture which needs neither serial-to-parallel nor parallel-to-serial converter. We compare four types of IFFT/FFT modules for the hardware complexity and operation : R22SDF (Radix-2 Single-path Delay feedback), the R2SDF (Radix-2 Single-path Delay feedback), R2SDF (Radix-4 Single-path Delay Feedback), and R4SDC (Radix-4 Single-path Delay Commutator). In order to minimize the error, we design the IFFT/FFT module to operate with additional decimal parts after butterfly operation. In case of the R22SDF, the IFFT/FFT module has 44,747 gate counts excluding RAMs and the minimized error rate as compared with other types. And we know that the R22SDF has a small hardware structure as compared with other types.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.9 no.4
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• pp.59-65
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• 2010

This paper presents the study on the contact stress analysis of a pair of mating spur gears during rotation. Contact stress analysis is performed between two spur gear teeth at different contact positions during rotation. An example is presented to investigate the variation of contact stress on a pair of mating gears with contact positions. The variation of contact stress during rotation is compared with the contact stress at lowest point of single tooth contact(LPSTC) and AGMA Equation for contact stress. The results show that contact stress varies along the contact position and gets maximum values in the beginning and end of the contact. In this study, the gear design considering the contact stress on a pair of mating gears is more severe than that of AGMA standard.

• Structural Engineering and Mechanics
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• v.18 no.6
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• pp.745-757
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• 2004

Lateral-torsional buckling moment resistances of I-shaped stepped beams with continuous lateral top-flange bracing under a single point load on the top flange and negative end moments were investigated. Stepped beam factors and a moment gradient correction factor suggested by Park et al. (2003, 2004) were used to develop new lateral buckling formula for beam designs. From the investigation of finite element analysis (FEA), new lateral buckling formula of beams with singly or doubly stepped member changes and with continuous lateral top-flange bracing subjected to a single point load on top flange and end moments were developed. The new design equation includes the length-to-height ratio factor to account for the increase of lateral-torsional buckling moment resistance as the increase of length-to-height ratio of stepped beams. The calculation examples for obtaining lateral-torsional buckling moment resistance using the new design equation indicate that engineers should easily determine the buckling capacity of the stepped beams.

• Journal of Institute of Control, Robotics and Systems
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• v.22 no.7
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• pp.513-518
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• 2016

The piezoelectric actuating device is known for its large power density and simple structure. It can generate a larger force than a conventional actuator and has also wide bandwidth with fast response in a compact size. To control the piezoelectric actuator, we need an analog signal conditioning circuit as well as digital microcontrollers. Conventional microcontrollers are not equipped with an analog part and need digital-to-analog converters, which makes the system bulky compared with the small size of piezoelectric devices. To overcome these weaknesses, we are developing a single-chip controller that can handle analog and digital signals simultaneously using mixed-signal FPGA technology. This gives more flexibility than traditional fixed-function microcontrollers, and the control speed can be increased greatly due to the parallel processing characteristics of the FPGA. In this paper, we developed a floating-point multiplier, PWM generator, 80-kHz power control loop, and 1-kHz position feedback control loop using a single mixed-signal FPGA. It takes only 50 ns for single floating-point multiplication. The PWM generator gives two outputs to control the charging and discharging of the high-voltage output capacitor. Through experimentation and simulation, it is demonstrated that the designed control loops work properly in a real environment.

• 유체기계공업학회:학술대회논문집
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• 1999.12a
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• pp.257-263
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• 1999

The flow characteristics of double suction pump are investigated by numerically Calculations are performed by using SIMPLE algorithm at the design and off-design points. Symmetric nature of flow fields in blade channels is discovered at design point, but asymmetirc effects are discovered at the off-design point. Numerical results show that the formation of secondary flow in volute of double suction pump shows different trends when compared with the case of single suction pump. Also results show that double vortices are formed in the volute cross section.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.51 no.2
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• pp.49-54
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• 2002

Most single-Phase brushless DC (BLDC) motors have unequal air gap to eliminate the dead-point where the developed torque value is zero. However this partial increase of the air gap deteriorates the motor characteristics in cogging torque. Thus in this paper a new topology of unequal air gap is proposed to solve this problem. The topology is to use some pairs of equal or unequal air gaps. As a result, it is proved by the finite element analysis and experimental results that the single-Phase BLDC motor with the proposed air gap topology is very effective in reducing the cogging torque.