• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.542-543
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• 2012

본 논문에서는 저항성 수하제어 방식과 단일루프 강인 전압 제어기를 적용하여 단상 UPS 인버터의 비통신선 방식 5-병렬 운전 결과를 기술한다. 단일 루프 강인 전압 제어기를 이용해 단상 3kVA UPS 인버터 5대로 병렬운전 환경을 구축하였고, 저항성 주파수-전압 강하 방식의 수하 제어를 이용하여 저항 부하와 선형 부하에 대한 전력분담 특성을 PSIM 시뮬레이션을 통하여 확인하였다.

• Journal of Power Electronics
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• v.17 no.1
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• pp.106-114
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• 2017

In this paper, the Selective Harmonic Mitigation-PWM (SHM-PWM) method is used in single-phase and three-phase Cascaded H-Bridge (CHB) inverters in order to fulfill different power quality standards such as EN 50160, CIGRE WG 36-05, IEC 61000-3-6 and IEC 61000-2-12. Non-equal DC link voltages are used to increase the degrees of freedom for the proposed SHM-PWM technique. In addition, it will be shown that the obtained solutions become continuous and without sudden changes. As a result, the look-up tables can be significantly reduced. The proposed three-phase modulation method can mitigate up to the 50th harmonic from the output voltage, while each switch has just one switching in a fundamental period. In other words, the switching frequency of the power switches are limited to 50 Hz, which is the lowest switching frequency that can be achieved in the multilevel converters, when the optimal selective harmonic mitigation method is employed. In single-phase mode, the proposed method can successfully mitigate harmonics up to the 50th, where the switching frequency is 150 Hz. Finally, the validity of the proposed method is verified by simulations and experiments on a 9-level CHB inverter.

• The Transactions of the Korean Institute of Power Electronics
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• v.15 no.3
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• pp.252-258
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• 2010

If the speed measurement of resolver and the generation of PWM signals are implemented with single microcontroller, it is easy to reduce the system cost and to avoid the switching noise of inverters. To avoid the switching noise and to improve the accuracy of measurement, PWM switching and A/D sampling of the resolver should be synchronized. Phase angle of the resolver excitation signal is increased in stepwise manner, then, the output signal of the resolver is measured in each step. From the measured data, the optimal phase angle of resolver excitation signal is estimated using the least square approximation method.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2129-2138
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• 2016

The full-bridge inverter, widely used for single-phase photovoltaic grid-connected applications, presents a leakage current issue. Therefore, an AC bypass branch is introduced to overcome this challenge. Nevertheless, existing modulation strategies entail drawbacks that should be addressed. One is the zero-crossing distortion (ZCD) of the AC current caused by neglecting the AC filter inductor voltage. Another is that the system cannot deliver reactive power because the AC bypass branch switches at the power frequency. To address these problems, this work proposes an optimized hybrid modulation strategy. To reduce ZCD, the phase angle of the inverter output voltage reference is shifted, thereby compensating for the neglected leading angle. To generate the reactive power, the interval of the negative power output is calculated using the power factor. In addition, the freewheeling switch is kept on when power is flowing into the grid and commutates at a high frequency when power is fed back to the DC side. In this manner, the dead-time insertion in the high-frequency switching area is minimized. Finally, the performances of the proposed modulation strategy and traditional strategies are compared on a universal prototype inverter. Experimental results validate the theoretical analysis.

• Proceedings of the KIPE Conference
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• 2018.11a
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• pp.62-64
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• 2018

In two-stage single-phase inverters, inherent double line frequency component is present at both input and output of the front-end converter. Generally large electrolytic capacitors are required to eliminate the ripple. It is well known that the low frequency ripple shortens the lifespan of the capacitor hence the system reliability. However, the ripple can hardly be eliminated without the hardware combined with an energy storage device or a certain control algorithm. In this paper, a novel power-decoupling control method is proposed to eliminate the double line frequency ripple at the front-end converter of the DC/AC power conversion system. The proposed control algorithm is composed of two loop, ripple rejection loop and average voltage control loop and no extra hardware is required. In addition, it does not require any information from the phase-locked-loop (PLL) of the inverter and hence it is independent of the inverter control. In order to prove the validity and feasibility of the proposed algorithm a 5kW Dual Active Bridge DC/DC converter and a single-phase inverter are implemented, and experimental results are presented.

• Proceedings of the KIPE Conference
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• 2018.11a
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• pp.104-106
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• 2018

The harmonics and the DC offset in the grid can cause serious synchronization problems for grid connected inverters (GCIs) which leads not able to satisfy the IEEE 519 and p1547 standards in terms of phase and frequency variations. In order to guarantee the smooth and reliable synchronization of GCIs with the grid, Phase Locked Loop (PLL) is the crucial element. Typically, the performance of the PLL is assessed to limit the grid disturbances e.g. grid harmonics, DC Offset and voltage sag etc. To ensure the quality of GCI, the PLL should be precise in estimating the grid amplitude, frequency and phase. Therefore, in this paper a novel Robust PLL technique called Digital Lock-in Amplifier (DLA) PLL is proposed. The proposed PLL estimate the frequency variations and phase errors accurately even in the highly distorted grid voltage conditions like grid voltage harmonics, DC offsets and grid voltage sag. To verify the performance of proposed method, it is compared with other six conventional used PLLs (CCF PLL, SOGI PLL, SOGI LPF PLL, APF PLL, dqDSC PLL, MAF PLL). The comparison is done by simulations on MATLAB Simulink. Finally, the experimental results are verified with Single Phase GCI Prototype.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.625-629
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• 2004

This paper presents a systematical approach to study carrier based PWM techniques (CPWM) in diode-clamped and cascade multilevel inverters by using a proposed named multi-modulating pattern method. This method is based on the vector correlation between CPWM and the space vector PWM (SVPWM) and applicable to both multilevel inverter topologies. A CPWM technique can be described in a general mathematical equation, and obtain the same outputs similarly as of the corresponding SVPWM. Control of the fundamental voltage, vector redundancies and phase redundancies in multilevel inverter can be formulated separately in the CPWM equation. The deduced CPWM can obtain the full vector redundancy control, and fully utilize phase redundancy in a cascade inverter In this continued part, it will be deduced correlation between CPWM equations in multi-carrier system and single carrier system, present the mathematical model of voltage source inverter related to the common mode voltage and propose a general algorithm for multi-modulating modulator. The obtained theory will be demonstrated by simulation results.

• Proceedings of the KIPE Conference
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• 2004.07a
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• pp.389-392
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• 2004

본 연구에서는 단상 5-레벨 cascaded 인버터의 출력 전압 및 전류의 파워 스펙트럼을 광대역으로 분산시키기 위한 멀티 캐리어 RPW(Random PWM)기법을 제안하였다. 제안된 방법은 고정 주파수의 멀티 캐리어 대신에 랜덤한 주파수의 삼각파 캐리어를 사용하고 있다. PD(Phase Disposition)방식 및 H(Hybrid)방식의 멀티 캐리어 RPW을 단상 cascade H-브리지 멀티 레벨 인버터에 적용하였다. 각 방식에 따른 출력 전압과 전류 파형 및 고조파 스펙트럼을 PSIM에 의하여 확인하였으며, 제안된 방식의 타당성을 입증할 수 있었다.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.52 no.12
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• pp.649-654
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• 2003

The simplest method for measuring output currents of the three phase inverters is to measure them with three current sensors such as hall sensors. This method requires at least two current sensors, and these types of sensors are somewhat expensive. More economical method is measuring DC link current with a simple shunt resistor, then, reconstructing output current using the DC link current value and the switching status. However, in low speed region, the measurement becomes difficult and even impossible due to the requirement of minimum switching duration for A/D conversion. These problems can be overcome by limitation of switching duration. Limitation of switching, however, causes voltage and current distortion. Owing to compensation, distortion can be effectively suppressed. However these increase acoustic noise due to increment of current ripple. In this paper, a current measurement method is proposed, which can reduce minimum switching duration resulting in reduction of acoustic noise. The validity of proposed method is confirmed through experiment.

• Journal of the Korean Solar Energy Society
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• v.37 no.3
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• pp.13-22
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• 2017

Anti-islanding scheme of grid-connected inverter is a key function of standards compliance, since unintentional islanding results in safety hazards, reliability, and many other issues. Therefore, many anti-islanding schemes have been researched, however, most of them have problems, which deteriorate performance of islanding detection under parallel-operation. Therefore, this paper proves the reason of problems and proposes a new anti-islanding scheme that has precise islanding detection under parallel-operation in single-phase and three-phase system. Finally, both simulation and experimental result validate the proposed scheme.