• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.326-329
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• 2000

In this paper, a complete methodology of incorporating the displacement current for the calculation of a single electron inverter characteristics has been devised. It has been implemented for the calculation of the low frequency noise spectrum in a single electron inverter in the framework of Monte-Carlo method. Our new methodology opens up a systematic way of analyzing transient behaviors of single electron circuits.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.8 no.3
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• pp.396-400
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• 1998

The physical properties of KLN single crystals very significantly according to the $Nb_2O_5$ content in grown crystal, therefore, it is very important to control the composition of KLN single crystals. In this study, KLN single crystals of high content $Nb_2O_5$ were grown by temperature fluctuation and TSSG (Top-seeded solution growth) methods with increasing the $Nb_2O_5$ content of starting solution. To investigate the existence of defect due to the increase of $Nb_2O_5$ content, dielectric and optical properties were measured. Due to the increase of defects in grown KLN single crystal, the shift of cutoff-frequency to lower energy and a broad Curie range, which shows the DPT (diffuse phase transition) characteristics, were observed.

• The Transactions of the Korean Institute of Power Electronics
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• v.23 no.2
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• pp.101-105
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• 2018

Shortage of electric power occurs frequently along with increased electric power demand. ESS is a precaution to solve this issue. Household ESS has a capacity of approximately 3 kW/7 kWh. Household ESS batteries are typically designed with nominal voltages between 40 and 50 V. To connect household ESS with a 220 V AC system, low battery voltages in power conditioning system (PCS) should be boosted. To boost low battery voltage and match it with AC grid voltage, the use of a transformer for a commercial frequency can be considered. To attenuate switching harmonics of the household single-phase ESS-PCS, LC filter can be installed in two positions: on the primary side or on the secondary side of a transformer. A method has been used generally in single-phase inverters for the ESS-PCS. In another method, however, the output efficiency of the ESS-PCS may be decreased. Parasitic components of the transformer can affect voltage losses, when the square wave with the switching frequency in the ESS-PCS is passed through the transformer windings. In this work, the characteristics of the transformer according to the position of an LC filter are investigated for household single-phase ESS-PCS.

• Journal of Power Electronics
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• v.15 no.2
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• pp.309-318
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• 2015

This study proposes a dual-output single-stage bridgeless single-ended primary-inductor converter (DOSSBS) that can completely remove the front-end full-bridge alternating current-direct current rectifier to accomplish power factor correction for universal line input. Without the need for bridge diodes, the proposed converter has the advantages of low component count and simple structure, and can thus significantly reduce power loss. DOSSBS has two uncommon output ports to provide different voltage levels to loads, instead of using two separate power factor correctors or multi-stage configurations in a single stage. Therefore, this proposed converter is cost-effective and compact. A magnetically coupled inductor is introduced in DOSSBS to replace two separate inductors to decrease volume and cost. Energy stored in the leakage inductance of the coupled inductor can be completely recycled. In each line cycle, the two active switches in DOSSBS are operated in either high-frequency pulse-width modulation pattern or low-frequency rectifying mode for switching loss reduction. A prototype for dealing with an $85-265V_{rms}$ universal line is designed, analyzed, and built. Practical measurements demonstrate the feasibility and functionality of the proposed converter.

• Advances in nano research
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• v.12 no.5
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• pp.483-488
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• 2022

The present work is an attempt to study the vibration analysis of the single-walled carbon nanotubes (SWCNTs) under the effect of the surface irregularity using Donnell's model. The surface irregularity represented by the parabolic form. According to Donnell's model and three-dimensional elasticity theory, a novel governing equations and its solution are derived and matched with the case of no irregularity effects. To understand the reaction of the nanotube to the irregularity effects in terms of natural frequency, the numerical calculations are done. The results obtained could provide a better representation of the vibration behavior of an irregular single-walled carbon nanotube, where the aspect ratio (L/d) and surface irregularity all have a significant impact on the natural frequency of vibrating SWCNTs. Furthermore, the findings of surface irregularity effects on vibration SWCNT can be utilized to forecast and prevent the phenomena of resonance of single-walled carbon nanotubes.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.11
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• pp.842-850
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• 2018

In this paper, the design and fabrication of a frequency-locked-loop(FLL) 5-GHz oscillator with a single resonator is presented. The proposed oscillator is the simplified version of the previous FLL oscillator with two separate resonators in the VCO and frequency detector. The resonator is commonly used in the VCO and frequency detector of the proposed oscillator configuration. The 5-GHz oscillator is implemented on the hetero-multilayer substrate composed of a Rogers' RO4350B laminate, which has excellent high-frequency performance, and the commercial FR4 three-layer substrate. The frequency locking occurs at approximately 5 GHz and has an output power of 3.8 dBm. The phase noise has a free-run VCO phase noise at frequencies above 1 kHz, and an FLL background noise at frequencies below 1 kHz. For this loop-filter, the phase noise showed an improvement of approximately 12 dB at the offset-frequency of 100 Hz.

• Progress in Superconductivity
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• v.4 no.1
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• pp.1-9
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• 2002

Transferring single flux quanta across a Josephson junction at an exactly determined rate has made highly precise voltage measurements possible. Making use of self-shunted Nb-based SINIS junctions, programmable fast-switching DC voltage standards with output voltages of up to 10 V were produced. This development is now extended from fundamental DC measurements to the precise determination of AC voltages with arbitrary waveforms. Integrated RSFQ circuits will help to replace expensive semiconductor devices for frequency control and signal coding. Easy-to-handle AC and inexpensive quantum voltmeters of fundamental accuracy would be of interest to industry. In analogy to the development in the flux regime, metallic nanocircuits comprising small-area tunnel junctions and providing the coherent transport of single electrons might play an important role in quantum current metrology. By precise counting of single charges these circuits allow prototypes of quantum standards for electric current and capacitance to be realised. Replacing single electron devices by single Cooper pair circuits, the charge transfer rates and thus the quantum currents could be significantly increased. Recently, the principles of the gate-controlled transfer of individual Cooper pairs in superconducting A1 devices in different electromagnetic environments were demonstrated. The characteristics of these quantum coherent circuits can be improved by replacing the small aluminum tunnel Junctions by niobium junctions. Due to the higher value of the superconducting energy gap ($\Delta_{Nb}$ ＝ $7\Delta_{Al}$), the characteristic energy and the frequency scales for Nb devices are substantially extended as compared to A1 devices. Although the fabrication of small Nb junctions presents a real challenge, the Nb-based metrological devices will be faster and more accurate in operation. Moreover, the Nb-based Cooper pair electrometer could be coupled to an Nb single Cooper pair qubit which can be beneficial for both, the stability of the qubit and its readout with a large signal-to-noise ratio..

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.9
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• pp.54-61
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• 2016

A 6-Gbps single-ended receiver with a linear equalizer and a self-reference generator is proposed for a high-speed interface with the double data rate. The proposed single-ended receiver uses a common gate amplifier to increase a voltage gain for an input signal with low voltage level. The continuous-time linear equalizer which reduces gain to the low frequencies and achieves high-frequency peaking gain is implemented in the common gate amplifier. Furthermore, a self-reference generator, which is controlled with the resolution 2.1 mV using digital averaging method, is implemented to maximize the voltage margin by removing the offset noise of the common gate amplifier. The proposed single-ended receiver is designed using a 65-nm CMOS process with 1.2-V supply and consumes the power of 15 mW at the data rate of 6 Gbps. The peaking gain in the frequency of 3 GHz of the designed equalizer is more than 5 dB compared to that in the low frequency.

• ETRI Journal
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• v.36 no.2
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• pp.188-196
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• 2014

This paper describes a simple delay diversity technique for terrestrial digital multimedia broadcasting (T-DMB) and digital audio broadcasting in a single-frequency network (SFN). For the diversity technique, a delay diversity scheme is adopted. In the delay diversity scheme, a non-delayed signal is transmitted in the first antenna, and delayed versions of the signal are transmitted in each additional antenna. For an SFN environment with multiple transmitters, delay diversity can be executed by controlling the emission times of the transmitters. This SFN delay diversity scheme does not require any hardware changes in either the transmitter or receiver, and perfect backward compatibility can be acquired. To evaluate the performance improvement, laboratory tests are executed with various types of commercial T-DMB receivers as well as a measurement receiver. The improvement in the bit error rate performance is evaluated using a measurement receiver, and an improvement of the threshold of visibility value is evaluated for commercial receivers. Test results show that the T-DMB system can obtain diversity gain using the described technique.

• Journal of Power Electronics
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• v.18 no.5
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• pp.1523-1535
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• 2018

High-performance Phase-Locked Loops (PLLs) are critical for grid synchronization in grid-tied power electronic applications. In this paper, a new single-phase All Digital Phase-Locked Loop (ADPLL) is proposed. It features fast transient response and good robustness under distorted grid conditions. It is designed for Field Programmable Gate Array (FPGA) implementation. As a result, a high sampling frequency of 1MHz can be obtained. In addition, a new OSG is adopted to track the power frequency, improve the harmonic rejection and remove the dc offset. Unlike previous methods, it avoids extra feedback loop, which results in an enlarged system bandwidth, enhanced stability and improved dynamic performance. In this case, a new parameter optimization method with consideration of loop delay is employed to achieve a fast dynamic response and guarantee accuracy. The Phase Detector (PD) and Voltage Controlled Oscillator (VCO) are realized by a Coordinate Rotation Digital Computer (CORDIC) algorithm and a Direct Digital Synthesis (DDS) block, respectively. The whole PLL system is finally produced on a FPGA. A theoretical analysis and experiments under various distorted grid conditions, including voltage sag, phase jump, frequency step, harmonics distortion, dc offset and combined disturbances, are also presented to verify the fast dynamic response and good robustness of the ADPLL.