• Title/Summary/Keyword: Single Phase Operation

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Operation Analysis of Downstream Intersections at Urban Freeway Off-ramps (도시고속도로 진출램프 하류부교차로 운영 분석 (중동 IC 사례 분석을 중심으로))

  • Jeon, Jae-Hyeon;Kim, Young-Chan;Jeoung, Young-Je
    • Journal of Korean Society of Transportation
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    • v.26 no.4
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    • pp.7-16
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    • 2008
  • Severe congestion is happening at urban freeway off-ramps in Seoul. Major causes of congestion at off-ramps are a shortage of capacity and inefficient signal operations at the downstream intersection at off-ramps. It is necessary to control congestion by improving design or operations in the downstream intersection. In this study, the authors analyzed the case of the Jungdong interchange that was improved for design in the downstream intersection. When a freeway and an arterial road cross, diamond interchanges are usually selected with a single-point urban interchange (SPUI) as an alternative. To compare the effectiveness of a diamond interchange with a SPUI, the authors applied these two configurations to the Jungdong interchange using a simulation. The result of the analysis shows that congestion at off-ramps in diamond interchanges can be reduced by improving signal operations such as the application of "4 phase with overlaps" and that diamond interchanges are more efficient than a SPUI with a frontage road. Efficient operation of the downstream intersection by these findings can minimize congestion of not only the downstream intersection but also the freeway mainline.

A High Speed and Low Jitter PLL Clock generator (고속 저잡음 PLL 클럭 발생기)

  • Cho, Jeong-Hwan;Chong, Jong-Wha
    • Journal of the Institute of Electronics Engineers of Korea TE
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    • v.39 no.3
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    • pp.1-7
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    • 2002
  • This paper presents a new PLL clock generator that can improve a jitter noise characteristics and acquisition process by designing a multi-PFD(Phase Frequency Detector) and an adaptive charge pump circuit. The conventional PLL has not only a jitter noise caused from such a demerit of the wide dead zone and duty cycle, but also a long delay interval that makes a high speed operation unable. An advanced multi-structured PFD circuit using the TSPC(True Single Phase Clocking) circuit is proposed, in which it shows an excellent functionalities in terms of the jitter noises by designing its circuit with the exact dead zone and duty cycle. Our new designed adaptive charge pump in the loop filter of a PLL can improve an acquisition characteristic by adaptively increasing of current. The Hspice simulation is done to evaluate the performance of the proposed circuit. Simulation result shows that our PLL has under 0.01ns in the dead zone, no influence from the duty cycle of input signals and under 50ns in the acquisition time. This circuit will be able to be used in develops of high-performance microprocessors and digital systems.  

A Precise Relative Positioning Method Based on Time-Differenced Carrier Phase Measurements from Low-Cost GNSS Receiver (저비용 GNSS 수신기를 이용한 반송파 위상 시각간 차분 측정치 기반의 정밀 상대위치 결정 기법)

  • Park, Kwi-Woo;Lee, DongSun;Park, Chansik
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.40 no.9
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    • pp.1846-1855
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    • 2015
  • In this paper, a precise relative positioning with TD(time differenced) carrier phase measurements from a low-cost GNSS(Global Navigation Satellite System) receiver is proposed and analysed. The proposed method is using carrier phase measurement from a single GNSS receiver that reference receiver is not required and stand alone positioning is possible. TD operation removes the troublesome integer ambiguity resolution problem, and if the time interval is short, other error, such as, ionospheric, tropospheric delay and ephemeris error are effectively eliminated. The error analysis of the proposed method shows that a precise and positioning with carrier phase is possible. The implemented system is evaluated using a real car experiments. The results show that the horizontal positioning error was less than 3m during 10 minutes experiments, which is 4 times more precise than the results of normal code based absolute positioning.

Power Control Strategies for Single-Phase Voltage-Controlled Inverters with an Enhanced PLL

  • Gao, Jiayuan;Zhao, Jinbin;He, Chaojie;Zhang, Shuaitao;Li, Fen
    • Journal of Power Electronics
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    • v.18 no.1
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    • pp.212-224
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    • 2018
  • For maintaining a reliable and secure power system, this paper describes the design and implement of a single-phase grid-connected inverter with an enhanced phase-locked loop (PLL) and excellent power control performance. For designing the enhanced PLL and power regulator, a full-bridge voltage-controlled inverter (VCI) is investigated. When the grid frequency deviates from its reference values, the output frequency of the VCI is unstable with an oscillation of 2 doubling harmonics. The reason for this oscillation is analyzed mathematically. This oscillation leads to an injection of harmonics into the grid and even causes an output active power oscillation of the VCI. For eliminating the oscillation caused by a PLL, an oscillation compensation method is proposed. With the proposed method, the VCI maintains the original PLL control characteristics and improves the PLL robustness under grid frequency deviations. On the basis of the above analysis, a power regulator with the primary frequency and voltage modulation characteristics is analyzed and designed. Meanwhile, a small-signal model of the power loops is established to determine the control parameters. The VCI can accurately output target power and has primary frequency and voltage modulation characteristics that can provide active and reactive power compensation to the grid. Finally, simulation and experimental results are given to verify the idea.

Evaluation of Three-Phase Actuated Operation at Diamond Interchanges (다이아몬드 인터체인지의 3현시 감응제어 평가)

  • 이상수
    • Journal of Korean Society of Transportation
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    • v.20 no.2
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    • pp.149-159
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    • 2002
  • The performance of two single-barrier three-phase control systems at diamond interchanges was evaluated for various traffic conditions. To emulate the actuated signal control, hardware-in-the-loop system combined with CORSIM simulation program was used. Two performance measures, average delay and total stops, were used for the evaluation process. Results showed that the two three-phase systems gave similar performance in terms of average delay, but not stops. The delay performance of each phasing system was generally dependent on the traffic pattern and ramp spacing. However, there was a distinct movement preference for each phasing system. The total stops decreased as the spacing increased, and it was the most sensitive variable that can differentiate between the two three-phase systems. It was also shown that the hardware-in-the-loop control could be a good method to overcome the limitations of current simulation technology.

Design and implementation of 3 kW Photovoltaic Power Conditioning System using a Current based Maximum Power Point Tracking (전류형 MPPT를 이용한 3 kW 태양광 인버터 시스템 제어기 설계 및 구현)

  • Cha, Han-Ju;Lee, Sang-Hoey;Kim, Jae-Eon
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.10
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    • pp.1796-1801
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    • 2008
  • In this paper, a new current based maximum power point tracking (CMPPT) method is proposed for a single phase photovoltaic power conditioning system and the current based MPPT modifies incremental conductance method. The current based MPPT method makes the entire control structure of the power conditioning system simple and uses an inherent current source characteristic of solar cell array. In addition, digital phase locked loop using an all pass filter is introduced to detect phase of grid voltage as well as peak voltage. Controllers about dc/dc boost converter, dc-link voltage, dc/ac inverter is designed for a coordinated operation. Furthermore, PI current control using a pseudo synchronous d-q transformation is employed for grid current control with unity power factor. 3kW prototype photovoltaic power conditioning system is built and its experimental results are given to verify the effectiveness of the proposed control schemes.

Two-Stage Ring Oscillator using Phase-Look-Ahead Mehtod and Its Application to High Speed Divider-by-Two Circuit (진상 위상 기법을 이용한 2단 링 구조 발진기 및 고속 나누기 2 회로의 고찰)

  • Hwang, Jong-Tae;Woo, Sung-Hun;Hwang, Myung-Woon;Ryu, Ji-Youl;Cho, Gyu-Hyeong
    • Proceedings of the KIEE Conference
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    • 1999.07g
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    • pp.3181-3183
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    • 1999
  • A CMOS two-stage oscillator applicable to requiring in- and quadrature-phase components such as RF and data retiming applications are presented using phase-look-ahead technique. This paper clearly describes the operation principle of the presented two-stage oscillator and the principle can be also applicable to the high speed high speed divide-by-two is usually used for prescaler of the frequency synthesizer. Also, the sucessful oscillation of the proposed oscillator using PLA is confirmed through the experiment. The test vehicle is designed using 0.8 ${\mu}m$ N-well CMOS process and it has a maximum 914MHz oscillation showing -75dBclHz phase noise at 100kHz offset with single 2V supply.

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MRAS Based Sensorless Control of a Series-Connected Five-Phase Two-Motor Drive System

  • Khan, M. Rizwan;Iqbal, Atif
    • Journal of Electrical Engineering and Technology
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    • v.3 no.2
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    • pp.224-234
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    • 2008
  • Multi-phase machines can be used in variable speed drives. Their applications include electric ship propulsion, 'more-electric aircraft' and traction applications, electric vehicles, and hybrid electric vehicles. Multi-phase machines enable independent control of a few numbers of machines that are connected in series in a particular manner with their supply being fed from a single voltage source inverter(VSI). The idea was first implemented for a five-phase series-connected two-motor drive system, but is now applicable to any number of phases more than or equal to five-phase. The number of series-connected machines is a function of the phase number of VSI. Theoretical and simulation studies have already been reported for number of multi-phase multi-motor drive configurations of series-connection type. Variable speed induction motor drives without mechanical speed sensors at the motor shaft have the attractions of low cost and high reliability. To replace the sensor, information concerning the rotor speed is extracted from measured stator currents and voltages at motor terminals. Open-loop estimators or closed-loop observers are used for this purpose. They differ with respect to accuracy, robustness, and sensitivity against model parameter variations. This paper analyses operation of an MRAS estimator based sensorless control of a vector controlled series-connected two-motor five-phase drive system with current control in the stationary reference frame. Results, obtained with fixed-voltage, fixed-frequency supply, and hysteresis current control are presented for various operating conditions on the basis of simulation results. The purpose of this paper is to report the first ever simulation results on a sensorless control of a five-phase two-motor series-connected drive system. The operating principle is given followed by a description of the sensorless technique.

Chromatic Dispersion Compensation via Mid-span Spectral Inversion with Periodically Poled $LiNbO_3$ Wavelength Converter at Low Pump Power

  • Kim, Min-Su;Ahn, Joon-Tae;Kim, Jong-Bae;Ju, Jung-Jin;Lee, Myung-Hyun
    • ETRI Journal
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    • v.27 no.3
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    • pp.312-318
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    • 2005
  • Mid-span spectral inversion (MSSI) has to utilize high optical pump power, for its operation principle is based on a nonlinear optical wavelength conversion. In this paper, a low pump-power operation of MSSI-based chromatic dispersion compensation (CDC) has been achieved successfully, for the first time to our knowledge, by introducing a noise pre-reduction scheme in cascaded wavelength conversions with periodically poled $LiNbO_3$ waveguides at a relatively low operation temperature. As preliminary studies, phase-matching properties and operation-temperature dependence of the wavelength converter (WC) were characterized. The WC pumped at 1549 nm exhibited a wide conversion bandwidth of 59 nm covering the entire C-band and a conversion efficiency of -23.6 dB at 11 dBm pump power. CDC experiments were implemented with 2.5 and 10 Gb/s transmission systems over 100 km single-mode fiber. Although it is well-known that the signal distortion due to chromatic dispersion is not critical at a 2.5 Gb/s transmission, the clear recovery of eye patterns was identified. At 10 Gb/s transmission experiments, eye patterns were retrieved distinctly from seriously distorted ones, and notable improvements in bit-error rates were acquired at a low pump power of 14 dBm.

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A Study on the Characteristics of PCS Using a Solar Cells Generation of Optimal Integrated (최적 일체형 태양광 발전용 전력변환장치 PCS 특성에 관한 연구)

  • Hwang, Lark Hoon
    • Journal of IKEEE
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    • v.23 no.3
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    • pp.1003-1014
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    • 2019
  • In this paper, we modeled the devices used easily in PV system circuits. Simulation tools use PSPICE to enable intuitive electrical circuit simulations. Simulations were also performed on the effects of temperature and spatial radiation that are easy to overlook when using solar cells using modelled libraries. In addition, for full operation of the photovoltaic system, a complete operation system for the DC-DC buck-boost converter and the MPPT(Maximum Power Point Tracking) control system was modeled and simulated to confirm good operation. In order to verify the operation of the simulation, we constructed an actual system with the same conditions in the simulation and experimented. As a result, we proposed a single-phase 3 kW grid-connected solar power converter.