• 제목/요약/키워드: Simulator level

검색결과 576건 처리시간 0.025초

기후변화 환경교육을 위한 디지털 해양정보 콘텐츠 개발 방안 연구 - 해수면 상승 체험 3D 시뮬레이터를 중심으로 - (Study on Development of Digital Ocean Information Contents for Climate Change and Environmental Education : Focusing on the 3D Simulator Experiencing Sea Level Rise)

  • 두진화;윤홍주;이철용
    • 한국전자통신학회논문지
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    • 제18권5호
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    • pp.953-964
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    • 2023
  • 기후변화는 부정할 수 없는 오늘날 인류가 직면한 가장 시급한 과제이다. 그러나 기후변화에 대한 국민적 관심과 인식 수준은 충분치 않아 보다 적극적인 교육과 함께 이를 지원할 콘텐츠 개발이 필요하다. 특히 가치관 형성 및 윤리의식 확립이 시작되는 초·중등교육 시기부터 기후변화 교육이 활발히 이루어져야 하나 수준 맞춤형 체험기반 전문교육 콘텐츠는 많지 않은 실정이다. 본 연구에서는 학습자가 간접적으로 기후변화를 체험할 수 있도록 하는 혁신적인 교육 도구로써 해수면 상승 체험 3D 시뮬레이터를 개발하였다. 해수면 상승 요소로 기후변화로 인한 해수면 상승뿐 아니라 폭풍해일고를 함께 고려하였으며, 특히 장기 파고관측 빅데이터 분석을 통해 시뮬레이터 기능을 설계한 것을 주요 특징으로 볼 수 있다. 초·중등 학생들에게 친숙하게 접근하기 위해 게임 엔진 'Unity'를 채용하였다. 더 나아가 본 시뮬레이터를 활용한 교육 콘텐츠를 함께 제안한다.

통합 차상신호장치 테스트용 시뮬레이터 개발 (The Development of Simulator for Integrated Onboard Signalling System(IOSS))

  • 김석헌;한재문;박탄세;조용기
    • 한국철도학회:학술대회논문집
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    • 한국철도학회 2011년도 춘계학술대회 논문집
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    • pp.363-367
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    • 2011
  • In this paper a simulator for Integrated Onboard Signalling System(IOSS) will be presented and illustrated. IOSS which is integrated with there signalling systems such as ERTMS/ETCS Level 1 ATP(Automatic Train Protection), ATC(Automatic Train Control) and ATS(Automatic Train Stop) is a signalling system for HEMU-400X(Highspeed Electric Multiple Unit - 400km/h eXperiment). HEMU-400X is under development as the next generation high-speed train in Korea. Before conducting a trial run of HEMU-400X with IOSS, we must carry out functional test of IOSS. The simulator is suggested in this paper for testing and verification of IOSS. The simulator can help to test all function of IOSS although a real train and trackside equipments are not existed. Also the simulator can make a fault in trackside equipment intentionally. In that scenario, we can figure out how IOSS handle emergency situations.

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가변 풍속과 터뷸런스를 고려한 가변속 풍력 발전 시스템 시뮬레이터 개발 (Emulation of Variable Wind Speed and Turbulance Effect in a Wind Turbine Simulator)

  • 송승호;김동용;양인선;경남호
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2006년도 추계학술대회
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    • pp.290-296
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    • 2006
  • Control algorithms and implementation issues for a wind turbine simulator are presented for realistic emulation of variable wind characteristics using a lab-scale motor and generator set. When the average wind speed nd turbulence level is given, the torque reference of prime mover is decided through various blocks, such as random wind speed generator, blade characteristic curves, and tower effect compensation. The variable nature of wind can be implemented and tested by not only the computer simulation but also the hardware-in-loop-simulator (HILS). Some application examples of HILS include the development and test of turbine control software for more efficient and stable operation. Feasibility of the proposed simulator has verified by computer simulations and experiment.

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3GPP 물리계층 시뮬레이터 설계를 이용한 W-CDMA 시스템 성능 분석 (Performance Analysis of W-CDMA Systems Using 3GPP Physical-Layer Simulator design)

  • 나인학;윤성재;김병기;우연식;김철성
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2001년도 제14회 신호처리 합동 학술대회 논문집
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    • pp.963-966
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    • 2001
  • The wideband DS-CDMA (W-CDMA) system is one of the candidates for the next generation mobile communication system known as IMT-2000. The important concept of W-CDMA is the introduction of intercell asynchronous operation. In this paper, we design and analyze the system level simulator for the International Mobile Tele communication - 2000 (IMT-2000) 3-rd generation partnership project (3GPP) system. We confirm how the simulator works by BER over different Eb/NO. This study will be expected to use as reference data in the development of asynchronous IMT-2000. In this paper, we analyze a physical layer of W-CDMA system and design a transmitter and receiver by using ADS (Advanced Design System). Also, we simulated a link level performance in Rayleigh fading channel environment. This study will be useful in the analysis and design of W-CDMA system.

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게이트 및 기능 레벨 논리 시뮬레이터 (A Gate and Functional Level Logic Simulator)

  • 박홍준;김종성;조순복;신용철;임인칠
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1987년도 전기.전자공학 학술대회 논문집(II)
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    • pp.1577-1580
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    • 1987
  • This paper proposes a gate and functional level logic simulator which can be run on XENIX O.S. The simulator has hierarchical structure including Hardware Description Language compiler, Waveform Description Language compiler, and Simulation Command Language compiler. The Hardware Description Language compiler generates data structure composed of gate structure, wire structure, condition structure, and event structure. Simulation algorithm is composed of selective trace and event-driven methods. To improve simulation speed, Cross Referenced Linked List Structure ia defined in building the data structure of circuits.

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OLP 시뮬레이터 기반의 다이오드 레이저 열처리 로봇시스템 개발 (Development of the Diode Laser Heat Treatment Robot System Based on OLP Simulator)

  • 박기진;윤성호
    • 한국기계가공학회지
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    • 제14권5호
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    • pp.8-14
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    • 2015
  • Heat treatment for car body molds is mainly a manual process performed by a worker. The performance of this process is affected by workers' skill level, and has limitation in maintaining uniform product quality. In this study, we developed a diode laser heat treatment robot system that implements an OLP type simulator to overcome the limitation of manual process, and to improve and stabilize the quality level. In addition, we verified the efficiency of the robot system and mechanism stability from the early stage through design verification and simulated analysis in the development stage. In addition, we carried out a field test to study the way to establish optimized D/B for diode laser heat treatment criteria for car body molds, such as heat treatment speed, interval, etc. via site experiment.

MOS 로직 및 타이밍 시뮬레이션을 위한 데이타구조 및 알고리즘 (A data structure and algorithm for MOS logic-with-timing simulation)

  • 공진흥
    • 전자공학회논문지A
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    • 제33A권6호
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    • pp.206-219
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    • 1996
  • This paper describes a data structure and evaluation algorithm to improve the perofmrances MOS logic-with-timing simulation in computation and accuracy. In order to efficiently simulate the logic and timing of driver-load networks, (1) a tree data structure to represent the mutual interconnection topology of switches and nodes in the driver-lod network, and (2) an algebraic modeling to efficiently deal with the new represetnation, (3) an evaluation algorithm to compute the linear resistive and capacitive behavior with the new modeling of driver-load networks are developed. The higher modeling presented here supports the structural and functional compatibility with the linear switch-level to simulate the logic-with-timing of digital MOS circuits at a mixed-level. This research attempts to integrate the new approach into the existing simulator RSIM, which yield a mixed-klevel logic-with-timing simulator MIXIM. The experimental results show that (1) MIXIM is a far superior to RSIM in computation speed and timing accuracy; and notably (2) th etiming simulation for driver-load netowrks produces the accuracy ranged within 17% with respect ot the analog simulator SPICE.

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게이트와 드레인/소오스 단락결함을 갖는 CMOS 회로의 스위치 레벨 결함 시뮬레이터 구현 (An Implementation of the switch-Level Fault Simulator for CMOS Circuits with a Gate-to-Drain/Source short Fault)

  • 정금섭;전흥우
    • 전자공학회논문지A
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    • 제31A권4호
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    • pp.116-126
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    • 1994
  • In this paper, the switch-level fault simulator for CMOS circuits with a gate-to-drain/source short fault is implemented. A fault model used in this paper is based on the graphical analysis of the electrical characteristics of the faulty MOS devices and the conversion of the faulty CMOS circuit to the equivalent faulty CMOS inverter in order to find its effect on the successive stage. This technique is very simple and has the increased accuracy of the simulation. The simulation result of the faulty circuit using the implemented fault simulator is compared with the result of the SPICE simulation.

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A Multi-Level Simulation Technique for Large-ScaleAnalog Integrated Circuits

  • Yang Jeemo
    • 한국산업정보학회:학술대회논문집
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    • 한국산업정보학회 1998년도 공동추계학술대회 경제위기 극복을 위한 정보기술의 효율적 활용
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    • pp.827-834
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    • 1998
  • This paper describes a multi-level simulation technique and its implementation, which accurately solve voltages and currents of circuits descreibed at mixed levels of abstractions. A metho to form a tightly coupled simulation environment is proposed and, starting from a description of a circuit, simulation set-up and analysis procedure of the multi-level simulator for a transient response are presented. Circuit and behavioral simulation techniques and their implementations composing the multi-level simulation are explained in detail. Most of the algorithms implemented in the simulation are based upon the standard simulation techniques in order to obtain the reliability and accuracy of conventinoal simulators. Simulation examples show that the multi-level simulator can analyze circuits containing highly nonlinear behavioral models without loss of accuracy provided the behavioral models are accurate enough.

전술통신망 성능분석을 위한 네트워크 시뮬레이터 구현 (Implementation of Network Level Simulator for Tactical Network Performance Analysis)

  • 최정인;신상헌;백해현;박민호
    • 한국군사과학기술학회지
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    • 제16권5호
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    • pp.666-674
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    • 2013
  • This paper studied about the design and implementation of tactical communication network simulator in order to obtain tactical communication network parameter, such as link capacity and routing plan, and a number of exceptional cases that may occur during actual deployment by conducting simulation of a large-scale tactical communication networks. This tactical communication network simulator provides equipment models and link models of commercial OPNET simulator for tactical communication network. In addition, 6 types of simulation scenario writings convenience functions and traffic generation models that may occur in situations of tactical communication network environment were implemented in order to enhance user friendliness. By taking advantages of SITL(System-In-The-Loop) function of OPNET, the tactical communication network simulator allows users to perform interoperability test between M&S models and actual equipment in operating simulation of tactical communication network, which is run on software. In order to confirm the functions and performance of the simulator, small-scale of tactical communication network was configured to make sure interoperability between SITL-based equipment and a large-scale tactical communication network was simulated and checked how to cope with traffic generated for each network node. As the results, we were able to confirm that the simulator is operated properly.