• 한국시뮬레이션학회논문지
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• 제8권4호
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• pp.1-8
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• 1999

This paper proposes an ATM switch architecture called Output Queued Batcher-Banyan switch (OQBBS). It consists of a Sorting Module, Expanding Module, and Output Queueing Modules. The principles of channel grouping and output queueing are used to increase the maximum throughput of an ATM switch. One distinctive feature of the OQBBS is that multiple cells can be simultaneously delivered to their desired output. The switch architecture is shown to be modular and easily expandable. The performance of the OQBBS in terms of throughput, cell delays, and cell loss rate under uniform random traffic condition is evaluated by computer simulation. The throughput and the average cell delay are close to the ideal performance behavior of a fully connected output queued crossbar switch. It is also shown that the OQBBS meets the cell loss probability requirement of $10^{-6}$.

• 한국경영과학회지
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• 제38권2호
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• pp.65-73
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• 2013

In the simulation output analysis, bootstrap method is an applicable resampling technique to insufficient data which are not significant statistically. The moving block bootstrap, the stationary bootstrap, and the threshold bootstrap are typical bootstrap methods to be used for autocorrelated time series data. They are nonparametric methods for stationary time series data, which correctly describe the original data. In the simulation output analysis, however, we may not use them because of the non-stationarity in the data set caused by the trend such as increasing or decreasing. In these cases, we can get rid of the trend by differencing the data, which guarantees the stationarity. We can get the bootstrapped data from the differenced stationary data. Taking a reverse transform to the bootstrapped data, finally, we get the pseudo-samples for the original data. In this paper, we introduce the applicability of bootstrap methods to the time series data having trend, and then verify it through the statistical analyses.

• Journal of Power Electronics
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• 제9권4호
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• pp.593-603
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• 2009

This paper proposes and describes the design and operational principles of a three-phase three-level nine switch voltage source inverter. The proposed topology consists of three bi-directional switches inserted between the source and the full-bridge power switches of the classical three-phase inverter. As a result, a three-level output voltage waveform and a significant suppression of load harmonics contents are obtained at the inverter output. The harmonics content of the proposed multilevel inverter can be reduced by half compared with two-level inverters. A Fourier analysis of the output waveform is performed and the design is optimized to obtain the minimum total harmonic distortion. The full-bridge power switches of the classical three-phase inverter operate at the line frequency of 50Hz, while the auxiliary circuit switches operate at twice the line frequency. To validate the proposed topology, both simulation and analysis have been performed. In addition, a prototype has been designed, implemented and tested. Selected simulation and experimental results have been provided.

• 전기학회논문지
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• 제58권10호
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• pp.2028-2037
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• 2009

This paper presents the simulator for dynamic modeling of a MT(micro turbine) during start-up period. The simulator is implemented by modeling a dynamic power of main components of a MT including compressor, combustor and turbine. A modeling for a MT under steady state operation can be accurately built from thermodynamics analysis. But dynamic modeling during start-up period is very difficult because efficiency of main components is very low and the designed value has big error and nonlinear characteristics during start-up. In this paper, new method without using thermodynamics analysis during start-up is proposed for the simulator. The power models of main components are derived from analysis of the experimental operation data by test motoring using a electric starter under constant power output. The simulator is developed using MATLAB/Simulink. For constant power output control, sensorless vector inverter is designed and algorithms for starting from stall and method for controling a output power are proposed. The performance of developed simulator is verified by comparing experimental and simulation start-up results.

• 한국시뮬레이션학회논문지
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• 제19권3호
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• pp.119-125
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• 2010

시뮬레이션 출력 분석 방법인 이동 블록 부트스트랩이나 정상 부트스트랩, 그리고 임계값 부트스트랩은 자기상관성이 존재하는 데이터에 적용 가능한 표본 재추출 방법론들이다. 이러한 부트스트랩 방법들은 데이터의 정상성을 가정하여 적용해 왔다. 그러나 실제 자료 또는 시뮬레이션 출력에 계절성이나 추세를 동반하여 그 정상성을 보장할 수 없는 경우에는 부트스트랩을 시뮬레이션 출력 분석에 적용하지 못하였다. 시뮬레이션 출력 분석 기법 중 자기상관성을 가장 잘 묘사하는 방법은 임계값 부트스트랩 방법이다. 임계값 부트스트랩은 자료의 임계값을 기준으로 주기를 형성하여 재추출하는 방법으로써 계절성이 존재하는 데이터에 부트스트랩을 적용한다면 임계값 부트스트랩과 유사한 정확도를 얻을 수 있다. 본 논문에서는 계절성이 존재하는 시계열 자료에 대한 부트스트랩 적용 가능성을 제시 및 검증해보고자 한다.

• 산업공학
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• 제11권3호
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• pp.89-101
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• 1998

The randomness of the input variables in simulation experiments produce output responses which are also realizations of random variables. The random responses make necessary the use of statistical inferences to adequately describe the stochastic nature of the output. The analysis of the simulation output of non-terminating simulations is frequently complicated by the autocorrelation of the output data and the effect of the initial conditions that produces biased estimates. The regenerative method has been developed to deal with some of the problems created by the random nature of the simulation experiments. It provides a simple solution to some tactical problems and can produce valid statistical results. However, not all processes can he modeled using the regenerative method. Other processes modeled as regenerative may not return to a given demarcating state frequently enough to allow for adequate statistical analysis. This paper shows how the state transformation concept was successfully used in a queueing model and a job shop model. Although the first example can be analyzed using the regenerative method. it has the problem of too few recurrences under certain conditions. The second model has the problem of no recurrences. In both cases, the state transformation increase the frequency of the demarcating state. It was shown that time state transformations are regenerative and produce more cycles than the best typical discrete demarcating state in a given run length.

• 디지털산업정보학회논문지
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• 제12권4호
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• pp.71-79
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• 2016

This study proposes a performance model of a shared bus multi-processor system and analyzes the effect of input/output types on system performance and overload of shared resources. This system performance model reflects the memory reference time in relation to the effect of input/output types on shared resources and the input/output processing time in relation to the input/output processor, disk buffer, and device standby places. In addition, it demonstrates the contribution of input/output types to system performance for comprehensive analysis of system performance. As the concept of workload in the probability theory and the presented model are utilized, the result of operating and analyzing the model in various conditions of processor capability, cache miss ratio, page fault ratio, disk buffer hit ratio (input/output processor and controller), memory access time, and input/output block size. A simulation is conducted to verify the analysis result.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1997년도 전력전자학술대회 논문집
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• pp.239-242
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• 1997

In this paper, the new filter that reduced output ripple to zero is proposed. This filter is composed of transformer and capacitor. The operating mode is verified with theoretical analysis of low ripple filter and computer simulation. DC-DC converter of input voltage DC 100[V], output 30[V]/30[A], switching frequency 20[KHz] is manufactured. In the result, computer simulation analysis is same to experimental result.

• 한국통신학회논문지
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• 제22권4호
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• pp.812-822
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• 1997

In this paper, we propose an architecture of the asynchronous shared-bus type switch with priority and fairness schemes. The switch architecture is an input and output queueing system, and the priority scheme is implemented in both input and output queues. We analyze packet delay of both input and output queues. In the analysis, we consider to stations with asymmetric arrival rates. Although we make some approximations in the analysis, the numerical results show good agreements with the simulation results.

• 전기학회논문지P
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• 제59권2호
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• pp.185-190
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• 2010

This paper presents the estimation on switching technique via output power source analysis of power conversion unit in electric railway vehicle. The focus of this study suggested an alternative on critical problems by using head electric power(HEP). To achieve this, we have measured output power of HEP, and measurement devices set up at output of transformer connected HEP to analysis quality on output power source of head electric power(HEP) unit in electric railway vehicle. Using results of measurement of it, parameters are assumed for simulation to confirm estimation on switching technique. It is confirmed that switching technique is Selected Harmonic Elimination PWM(SHEPWM) and inverter switching frequency is less than 500[Hz]. Throughout experiment and simulation, it is estimated that switching technique used HEP is advanced SHEPWM and switching frequency is about 300[Hz]. Also leakage inductance in transformer is about $180[{\mu}H]$ less than $365[{\mu}H]$ known.