• Applied Chemistry for Engineering
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• v.10 no.6
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• pp.843-847
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• 1999

In this research, C/SiC composites, i.e. activated carbon coated with SiC obtained from dichlorodimethylsilane(DDS) and hydrogen, have been made by chemical vapor infiltration(CVI) in a fluidized bed reactor. Activated carbons of sizes of 4~12, 12~20, and 20~40 mesh were used. After deposition the surface area, the amount and the shape of deposit of each sample were observed at different concentrations of reactant DDS, sizes of activated carbon, reaction pressures and reaction times. The experimental results showed that uniform deposition in the pores of sample was obtained at a lower concentration of DDS and a lower pressure. Additionally, from the observation that the pore diameter and the surface area have minimum values at a certain time of deposition, it was known that deposition occurred inside of the pore at first and then on the outside of particle. Small particles of SiC were deposited uniformly on the surface of activated carbon at lower DDS concentrations and lower reaction pressures. The results were confirmed by SEM, TGA, the pore size distribution analyzer and BET.

• Journal of Sensor Science and Technology
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• v.8 no.2
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• pp.115-123
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• 1999

A micro-gas sensor with heater and sensing electrode on the same plane was fabricated on phosphosilicate glass(PSG, 800nm)/$Si_3N_4$ (150nm) dielectric membrane. PSG film was provided by atmospheric pressure chemical vapor deposition(APCVD), and $Si_3N_4$ film by low pressure chemical vapor deposition (LPCVD). Total area of the fabricated device was $3.78{\times}3.78mm^2$. The area of diaphragm was $1.5{\times}1.5mm^2$, and that of the sensing layer was $0.24{\times}0.24mm^2$. Finite-element simulation was employed to estimate temperature distribution for a square-shaped diaphragm. The power consumption of Pt heater was about 85mW at $350^{\circ}C$. Tin thin films were deposited on the silicon substrate by thermal evaporation at room temperature and $232^{\circ}C$, and tin oxide films($SnO_2$) were prepared by thermal oxidation of the metallic tin films at $650^{\circ}C$ for 3 hours in oxygen ambient. The film analyses were carried out by SEM and XRD techniques. Effects of humidity and ambient temperature on the resistance of the sensing layer were found to be negligible. The fabricated micro-gas sensor exhibited high sensitivity to butane gas.

• Korean Journal of Materials Research
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• v.9 no.10
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• pp.1006-1011
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• 1999

B-doped hydrogenated amorphous silicon carbide (a-SiC:H) thin films were prepared by plasma-enhanced chemical-vapor deposition in a gas mixture of $SiH_4$, $CH_4$ and $B_2H_6$. Microstructures and chemical properties of a-SiC:H films grown with varing the volume ratio of $CH_4$ to $SiH_4$ were characterized with various analysis methods including scanning electron microscopy(SEM), X-ray diffractometry(XRD), Raman spectroscopy, Fourier-transform infrared (FTIR) spectroscopy. X-ray photoelectron spectroscopy(XPS), UV absorption spectroscopy and photoconductivity measurements. While Si:H films grown without $CH_4$ showed amorphous state, the addition of $CH_4$ during deposition enhanced the development of a microcrystalline phase. By introducing C atoms into the film, Si-Si and Si--$\textrm{H}_{n}$ bonds of a -Si:H films were gradually replaced by Si-C, C-C, and Si--$\textrm{C}_{n}\textrm{H}_{m}$ bonds. Consequently, the electrical resistivity and optical bandgap of a-SiC:H films were increased with the C concentration in the film.

• Journal of the Korean Ceramic Society
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• v.40 no.12
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• pp.1202-1207
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• 2003

Using a recently developed Hybric Plasma-Particle Accelerating Impact Deposition (HP-PAID) process, synthesis of nanostructured silicon coatings has been investigated by injecting vapor-phase TEOS (tetraethosysilane, (C$_2$H$\_$5/O)$_4$Si) into an Ar hybrid plasma. The plasma jet with reactants was expanded through nozzle into a deposition chamber, with the pressure dropping from 700 to 10 torr. Ultrafine particles accelerated in the free jet downstream of the nozzle, deposited by an inertial impaction onto a temperature controlled substrate. By using this process, nanostructured amorphous silicon coatings with grain size smaller than 10 nm could be synthesized. These samples were annealed in an Ar and crystallized at 900$^{\circ}C$ for 30 min. TEM analysis showed that the annealed coatings were also composed of nanoparticles smaller than 10 nm, which showed a good consistency that the average grain size of 7 nm was also estimated from a peak shift of 2.39 cm$\^$-1/ and Full Width at Half Maximum (FWHM) 5.92 cm$\^$-1/ of Raman analysis. The noteworthy is that a strong PL peak at 398 nm was also obtained for this sample, which indicates that the deposited coatings also contained 3∼4 nm nanostructured grains.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.39 no.10
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• pp.825-829
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• 2015

Theoretical calculations suggest that the thermoelectric figure of merit (ZT) can be improved by introducing a core-shell heterostructure to a semiconductor nanowire because of the reduced thermal conductivity of the nanowire. To experimentally verify the decrease in thermal conductivity in core-shell nanowires, the thermal conductivity of Ge-SixGe1-x core-shell nanowires grown by chemical vapor deposition (CVD) was measured using suspended microdevices. The silicon composition (Xsi) in the shells was measured to be about 0.65, and the remainder of the germanium in the shells was shown to play a role in decreasing defects originating from the lattice mismatch between the cores and shells. In addition to the standard four-point current- voltage (I-V) measurement, the measurement configuration based on the Wheatstone bridge was attempted to enhance the measurement sensitivity. The measured thermal conductivity values are in the range of 9-13 W/mK at room temperature and are lower by approximately 30 than that of a germanium nanowire with a comparable diameter.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.162-162
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• 2010

InSb has received great attentions as a promising candidate for the active layer of infrared photodetectors due to the well matched band gap for the detection of $3{\sim}5\;{\mu}m$ infrared (IR) wavelength and high electron mobility (106 cm2/Vs at 77 K). In the fabrication of InSb photodetectors, passivation step to suppress dark currents is the key process and intensive studies were conducted to deposit the high quality passivation layers on InSb. Silicon dioxide (SiO2), silicon nitride (Si3N4) and anodic oxide have been investigated as passivation layers and SiO2 is generally used in recent InSb detector fabrication technology due to its better interface properties than other candidates. However, even in SiO2, indium oxide and antimony oxide formation at SiO2/InSb interface has been a critical problem and these oxides prevent the further improvement of interface properties. Also, the mechanisms for the formation of interface phases are still not fully understood. In this study, we report the quantitative analysis of indium and antimony oxide formation at SiO2/InSb interface during plasma enhanced chemical vapor deposition at various growth temperatures and subsequent heat treatments. 30 nm-thick SiO2 layers were deposited on InSb at 120, 160, 200, 240 and $300^{\circ}C$, and analyzed by X-ray photoelectron spectroscopy (XPS). With increasing deposition temperature, contents of indium and antimony oxides were also increased due to the enhanced diffusion. In addition, the sample deposited at $120^{\circ}C$ was annealed at $300^{\circ}C$ for 10 and 30 min and the contents of interfacial oxides were analyzed. Compared to as-grown samples, annealed sample showed lower contents of antimony oxide. This result implies that reduction process of antimony oxide to elemental antimony occurred at the interface more actively than as-grown samples.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.11a
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• pp.477-480
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• 2002

Si-O-C(-H) thin film with a tow dielectric constant were deposited on a P-type Si(100) substrate by an inductively coupled plasma chemical vapor deposition (ICPCVD). Bis-trimethylsilymethane (BTMSM, H$_{9}$C$_3$-Si-CH$_2$-Si-C$_3$H$_{9}$) and oxygen gas were used as Precursor. Hybrid type Si-O-C(-H) thin films with organic material have been generated many voids after annealing. Consequently, the Si-O-C(-H) films can be made a low dielectric material by the effect of void. The surface characterization of Si-O-C(-H) thin films were performed by SEM(scanning electron microscope). The characteristic analysis of Si-O-C(-H) thin films were performed by X-ray photoelectron spectroscopy (XPS).

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.7
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• pp.1448-1452
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• 2004

In this paper, a photodiode capable of obtaining a sufficient photo/ dark current ratio at both a forward bias state and a reverse bias state is proposed. The photodiode includes a glass substrate, an Cr thin film formed as a lower electrode over the glass substrate, Cr silicide thin film(∼l00$\AA$) ) formed as a schottky barrier over the Cr thin film, a hydrogenated amorphous silicon film formed as a photo conduction layer over a portion of the Cr silicide thin film. Transparent conduction film ITO (thickness 100nm) formed as an upper electrode over the hydro-generated amorphous silicon film is then deposited in pure argon at room temperature for the Schottky contact and light window. The high quality Cr silicide thin film using annealing of Cr and a-Si:H is formed and analyzed by experiment. We have obtained the film with a superior characteristics. The dark current of the ITO/a-Si:H Schottky at a reverse bias of -5V is ∼3$\times$IO-12 A/un2, and one of the lowest reported, hitherto. AES(Auger Electron Spectroscophy) measurements indicate that this notable improvement in device characteristics stems from reduced diffusion of oxygen, rather than indium, from the ITO into the a-Si:H layer, thus, preserving the integrity of the Schottky interface. The spectral response of the photodiode for wavelengths in the range from 400nm to 800nm shows the expected behavior whereby the photocurrent is governed by the absorption characteristics of a-Si:H.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.186-186
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• 2000

After LeComber et al. reported the first amorphous hydrogenated silicon (a-Si: H) TFT, many laboratories started the development of an active matrix LCDs using a-Si:H TFTs formed on glass substrate. With increasing the display area and pixel density of TFT-LCD, however, high mobility TFTs are required for pixel driver of TF-LCD in order to shorten the charging time of the pixel electrodes. The most important of these drawbacks is a-Si's electron mobiliy, which is the speed at which electrons can move through each transistor. The problem of low carier mobility for the a-Si:H TFTs can be overcome by introducing polycrystalline silicon (poly-Si) thin film instead of a-Si:H as a semiconductor layer of TFTs. Therefore, poly-Si has gained increasing interest and has been investigated by many researchers. Recnetly, fabrication of such poly-Si TFT-LCD panels with VGA pixel size and monolithic drivers has been reported, . Especially, fabricating poly-Si TFTs at a temperature mach lower than the strain point of glass is needed in order to have high mobility TFTs on large-size glass substrate, and the monolithic drivers will reduce the cost of TFT-LCDs. The conventional methods to fabricate poly-Si films are low pressure chemical vapor deposition (LPCVD0 as well as solid phase crystallization (SPC), pulsed rapid thermal annealing(PRTA), and eximer laser annealing (ELA). However, these methods have some disadvantages such as high deposition temperature over $600^{\circ}C$, small grain size (<50nm), poor crystallinity, and high grain boundary states. Therefore the low temperature and large area processes using a cheap glass substrate are impossible because of high temperature process. In this study, therefore, we have deposited poly-Si thin films on si(100) and glass substrates at growth temperature of below 40$0^{\circ}C$ using newly developed high rate magnetron sputtering method. To improve the sputtering yield and the growth rate, a high power (10~30 W/cm2) sputtering source with unbalanced magnetron and Si ion extraction grid was designed and constructed based on the results of computer simulation. The maximum deposition rate could be reached to be 0.35$\mu$m/min due to a high ion bombardment. This is 5 times higher than that of conventional sputtering method, and the sputtering yield was also increased up to 80%. The best film was obtained on Si(100) using Si ion extraction grid under 9.0$\times$10-3Torr of working pressure and 11 W/cm2 of the target power density. The electron mobility of the poly-si film grown on Si(100) at 40$0^{\circ}C$ with ion extraction grid shows 96 cm2/V sec. During sputtering, moreover, the characteristics of si source were also analyzed with in situ Langmuir probe method and optical emission spectroscopy.

• Journal of the Korean Vacuum Society
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• v.17 no.6
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• pp.528-537
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• 2008

60 nm and 20 nm thick hydrogenated amorphous silicon(a-Si:H) layers were deposited on 200 nm $SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by an e-beam evaporator. Finally, 30 nm-Ni/(60 nm and 20 nm) a-Si:H/200 nm-$SiO_2$/single-Si structures were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 40 sec. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy(FE-SEM), transmission electron microscopy(TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide from the 60 nm a-Si:H substrate showed low sheet resistance from $400^{\circ}C$ which is compatible for low temperature processing. The nickel silicide from 20 nm a-Si:H substrate showed low resistance from $300^{\circ}C$. Through HRXRD analysis, the phase transformation occurred with silicidation temperature without a-Si:H layer thickness dependence. With the result of FE-SEM and TEM, the nickel silicides from 60 nm a-Si:H substrate showed the microstructure of 60 nm-thick silicide layers with the residual silicon regime, while the ones from 20 nm a-Si:H formed 20 nm-thick uniform silicide layers. In case of SPM, the RMS value of nickel silicide layers increased as the silicidation temperature increased. Especially, the nickel silicide from 20 nm a-Si:H substrate showed the lowest RMS value of 0.75 at $300^{\circ}C$.