• 한국재료학회지
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• 제15권3호
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• pp.149-154
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• 2005

Teflon like fluorocarbon thin films have been deposited on silicon and oxide molds as an antistiction layer for the hot embossing process by an inductively coupled plasma (ICP) chemical vapor deposition (CVD) method. The process was performed at $C_4F_8$ gas flow rate of 2 sccm and 30 W of plasma power as a function of substrate temperature. The thickness of film was measured by a spectroscopic ellipsometry. These films were left in a vacuum oven of 100, 200 and $300^{\circ}C$ for a week. The change of film thickness, contact angle and adhesion and friction force was measured before and after the thermal test. No degradation of film was observed when films were treated at $100^{\circ}C$. The heat treatment of films at 200 and $300^{\circ}C$ caused the reduction of contact angles and film thickness in both silicon and oxide samples. Higher adhesion and friction forces of films were also measured on films treated at higher temperatures than $100^{\circ}C$. No differences on film properties were found when films were deposited on either silicon or oxide. A 100 nm silicon template with 1 to $500\;{\mu}m$ patterns was used for the hot embossing process on $4.5\;{\mu}m$ thick PMMA spun coated silicon wafers. The antistiction layer of 10 nm was deposited on the silicon mold. No stiction or damages were found on PMMA surfaces even after 30 times of hot embossing at $200^{\circ}C$ and 10 kN.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.207-207
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• 2012

Si quantum dot (QD) imbedded in a $SiO_2$ matrix is a promising material for the next generation optoelectronic devices, such as solar cells and light emission diodes (LEDs). However, low conductivity of the Si quantum dot layer is a great hindrance for the performance of the Si QD-based optoelectronic devices. The effective doping of the Si QDs by semiconducting elements is one of the most important factors for the improvement of conductivity. High dielectric constant of the matrix material $SiO_2$ is an additional source of the low conductivity. Active doping of B was observed in nanometer silicon layers confined in $SiO_2$ layers by secondary ion mass spectrometry (SIMS) depth profiling analysis and confirmed by Hall effect measurements. The uniformly distributed boron atoms in the B-doped silicon layers of $[SiO_2(8nm)/B-doped\;Si(10nm)]_5$ films turned out to be segregated into the $Si/SiO_2$ interfaces and the Si bulk, forming a distinct bimodal distribution by annealing at high temperature. B atoms in the Si layers were found to preferentially substitute inactive three-fold Si atoms in the grain boundaries and then substitute the four-fold Si atoms to achieve electrically active doping. As a result, active doping of B is initiated at high doping concentrations above $1.1{\times}10^{20}atoms/cm^3$ and high active doping of $3{\times}10^{20}atoms/cm^3$ could be achieved. The active doping in ultra-thin Si layers were implemented to silicon quantum dots (QDs) to realize a Si QD solar cell. A high energy conversion efficiency of 13.4% was realized from a p-type Si QD solar cell with B concentration of $4{\times}1^{20}atoms/cm^3$. We will present the diffusion behaviors of the various dopants in silicon nanostructures and the performance of the Si quantum dot solar cell with the optimized structures.

• 대한전자공학회논문지
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• 제26권4호
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• pp.67-72
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• 1989

부분산화공정(LOCOS : local oxidation of silicon)에서 발생하는 새부리의 길이를 줄이기 위하여 상온 플라즈마 질화막을 잉요한 시로운 공정에 대해 연구하였다. 400W, 100kHz의 교류 전력에 의한 질소 플라즈마로 실리콘 위에 두께가 $100{\AA}$ 미만의 균일한 실리콘 질화막을 형성시킬 수 있었다. 이렇게 형성된 질화막은 실리콘을 4000${\AA}$두께로 산화시키는 공정에서 실리콘의 산화를 효과적으로 방지할 수 있었고 새부리의 길이를 0.2${mu}m$로 감소시킬 수 있다는 것을 SEM 단면도로 확인하였다. 이 길이는 두꺼운 LPCVD 질화막을 이용한 기존의 부분산화공정에서의 0.7${mu}m$ 보다 훨씬 줄어든 것이다. Secco에칭 후 SCM으로 단면을 보았을때 새부리 근처에서 결정 결함을 관찰할 수 없었다. 이 새로운 LOCOS공정으로 $N^+/P^-\;well,\;P^+/N^-$ well 다이오드를 만들어 누설전류를 측정하였다. 그 결과 기존의 LOCOS 공정에 의한 성질보다 우수하거나 동등한 성질을 나타내었다.

• 대한금속재료학회지
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• 제50권4호
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• pp.331-337
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• 2012

Electrical properties as a function of composition in silicon nitride ($SiN_x$) films grown at low temperatures ($<200^{\circ}C$) were studied for applications to photonic devices and thin film transistors. Both silicon-rich and nitrogen-rich compositions were successfully produced in final films by controlling the source gas mixing ratio, $R=[(N_2\;or\;NH_3)/SiH_4]$, and the RF plasma power. Depending on the film composition, the dielectric and optical properties of $SiN_x$ films varied substantially. Both the resistivity and breakdown field strength showed the maximum value at the stoichiometric composition (N/Si = 1.33), and degraded as the composition deviated to either side. The electrical properties degraded more rapidly when the composition shifted toward the silicon-rich side than toward the nitrogen-rich side. The composition shift from the silicon-rich side to the nitrogen-rich side accompanied the shift in the photoluminescence characteristic peak to a shorter wavelength, indicating an increase in the band gap. As long as the film composition is close to the stoichiometry, the breakdown field strength and the bulk resistivity showed adequate values for use as a gate dielectric layer down to $150^{\circ}C$ of the process temperature.

• 한국재료학회지
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• 제20권11호
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• pp.617-622
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• 2010

We have studied methods to save Si source during the fabrication process of crystalline Si solar cells. One way is to use a thin silicon wafer substrate. As the thickness of the wafers is reduced, mechanical fractures of the substrate increase with the mechanical handling of the thin wafers. It is expected that the mechanical fractures lead to a dropping of yield in the solar cell process. In this study, the mechanical properties of 220-micrometer-solar grade Cz p-type monocrystalline Si wafers were investigated by varying saw-damage etching conditions in order to improve the flexural strength of ultra-thin monocrystalline Si solar cells. Potassium hydroxide (KOH) solution and tetramethyl ammonium hydroxide (TMAH) solution were used as etching solutions. Etching processes were operated with a varying of the ratio of KOH and TMAH solutions in different temperature conditions. After saw-damage etching, wafers were cleaned with a modified RCA cleaning method for ten minutes. Each sample was divided into 42 pieces using an automatic dicing saw machine. The surface morphologies were investigated by scanning electron microscopy and 3D optical microscopy. The thickness distribution was measured by micrometer. The strength distribution was measured with a 4-point-bending tester. As a result, TMAH solution at $90^{\circ}C$ showed the best performance for flexural strength.

• 한국진공학회지
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• 제21권1호
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• pp.62-68
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• 2012

건재 일체형 태양광발전(BIPV) 응용을 위해 광 입사각에 따른 태양전지의 변환 효율은 중요하다. 양자효율은 태양전지의 파장별 전자 수집효율을 말하며, 입사각별 양자효율 측정으로 입사각에 따른 태양전지 출력 변화 요인을 분석할 수 있다. 이러한 입사각별 양자효율은 태양전지 종류에 따라 차이를 보인다. 본 연구에서는 가장 많이 쓰이는 벌크형 단결정 실리콘 태양전지와 박막형 비정질 실리콘 태양전지의 입사각별 양자효율을 비교하였다. 그 결과, 단결정 실리콘 태양전지에서는 광 입사각이 증가함에 따라 전 파장영역에서 양자효율이 감소했다. 반면, 비정질 박막 실리콘 태양전지에서는 단파장 영역에서는 결정질 실리콘과 동일하게 감소하였으나, 그 이후의 흡수 영역에서 약 $40^{\circ}$의 입사각까지 증가 또는 일정한 양자효율을 보이다가 이후에 급격히 감소하는 결과를 얻었다. 이는 비정질 박막 실리콘 태양전지에서 입사각이 증가함에 따라 특정 파장 영역에서 산란과 박막 구조의 영향으로 예상된다. 따라서, 태양전지의 구조 및 광학 구조 최적화 등으로 BIPV 적용에 유리한 구조 태양전지 제작이 가능할 것으로 보인다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.204-205
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• 2011

In thin film silicon solar cells, p-i-n structure is adopted instead of p/n junction structure as in wafer-based Si solar cells. PECVD is a most widely used thin film deposition process for a-Si:H or ${\mu}c$-Si:H solar cells. For best performance of thin film silicon solar cell, the dopant profiles at p/i and i/n interfaces need to be as sharp as possible. The sharpness of dopant profiles can easily achieved when using multi-chamber PECVD equipment, in which each layer is deposited in separate chamber. However, in a single-chamber PECVD system, doped and intrinsic layers are deposited in one plasma chamber, which inevitably impedes sharp dopant profiles at the interfaces due to the contamination from previous deposition process. The cross-contamination between layers is a serious drawback of a single-chamber PECVD system in spite of the advantage of lower initial investment cost for the equipment. In order to resolve the cross-contamination problem in single-chamber PECVD systems, flushing method of the chamber with NH3 gas or water vapor after doped layer deposition process has been used. In this study, a new plasma process to solve the cross-contamination problem in a single-chamber PECVD system was suggested. A single-chamber VHF-PECVD system was used for superstrate type p-i-n a-Si:H solar cell manufacturing on Asahi-type U FTO glass. A 80 MHz and 20 watts of pulsed RF power was applied to the parallel plate RF cathode at the frequency of 10 kHz and 80% duty ratio. A mixture gas of Ar, H2 and SiH4 was used for i-layer deposition and the deposition pressure was 0.4 Torr. For p and n layer deposition, B2H6 and PH3 was used as doping gas, respectively. The deposition temperature was $250^{\circ}C$ and the total p-i-n layer thickness was about $3500{\AA}$. In order to remove the deposited B inside of the vacuum chamber during p-layer deposition, a high pulsed RF power of about 80 W was applied right after p-layer deposition without SiH4 gas, which is followed by i-layer and n-layer deposition. Finally, Ag was deposited as top electrode. The best initial solar cell efficiency of 9.5 % for test cell area of 0.2 $cm^2$ could be achieved by applying the in-situ plasma cleaning method. The dependence on RF power and treatment time was investigated along with the SIMS analysis of the p-i interface for boron profiles.

• 한국재료학회지
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• 제22권4호
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• pp.190-194
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• 2012

The formation of high-quality polycrystalline silicon (poly-Si) on relatively low cost substrate has been an important issue in the development of thin film solar cells. Poly-Si seed layers were fabricated by an inverse aluminum-induced crystallization (I-AIC) process and the properties of the resulting layer were characterized. The I-AIC process has an advantage of being able to continue the epitaxial growth without an Al layer removing process. An amorphous Si precursor layer was deposited on Corning glass substrates by RF magnetron sputtering system with Ar plasma. Then, Al thin film was deposited by thermal evaporation. An $SiO_2$ diffusion barrier layer was formed between Si and Al layers to control the surface orientation of seed layer. The crystallinity of the poly-Si seed layer was analyzed by Raman spectroscopy and x-ray diffraction (XRD). The grain size and orientation of the poly-Si seed layer were determined by electron back scattering diffraction (EBSD) method. The prepared poly-Si seed layer showed high volume fraction of crystalline Si and <100> orientation. The diffusion barrier layer and processing temperature significantly affected the grain size and orientation of the poly Si seed layer. The shorter oxidation time and lower processing temperature led to a better orientation of the poly-Si seed layer. This study presents the formation mechanism of a poly seed layer by inverse aluminum-induced crystallization.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.279.1-279.1
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• 2016

박막 트랜지스터 (thin film transistor, TFT)는 고밀도, 대면적화로 높은 전자의 이동도가 요구되면서, 비정질 실리콘 (a-Si)에서 다결정 실리콘 (poly-Si) TFT 로 연구되었다. 이에 따라 비정질 실리콘에서 결정질 실리콘으로의 상변화에 대한 결정화 연구가 활발히 진행되었다. 또한, 박막 태양전지 분야에서도 유리기판 위에 비정질 층을 증착한 후에 열처리를 통해 상변화하는 고상 결정화 (solid-phase crystallization, SPC) 기술을 적용하여, CSG (thin-film crystalline silicon on glass) 태양전지를 보고하였다. 이러한 비정질 실리콘 층의 결정화 기술을 결정질 실리콘 태양전지 에미터 형성 공정에 적용하고자 한다. 이 때, 플라즈마화학증착 (Plasma-enhanced chemical vapor deposition, PECVD) 장비로 증착된 비정질 실리콘 층의 열처리를 통한 결정화 정도가 중요한 요소이다. 따라서, 비정질 실리콘 층의 결정화에 영향을 주는 인자에 대해 연구하였다. 비정질 실리콘 증착 조건(H2 가스 비율, 도펀트 유무), 실리콘 기판의 결정방향, 열처리 온도에 따른 결정화 정도를 엘립소미터(elipsometer), 투과전자현미경 (transmission electron microscope, TEM), 적외선 분광기 (Fourier Transform Infrared, FT-IR) 측정을 통하여 비교 하였다. 이를 기반으로 결정화 온도에 따른 비정질 실리콘의 결정화를 위한 활성화 에너지를 계산하였다. 비정질 실리콘 증착 조건 보다 기판의 결정방향이 결정화 정도에 크게 영향을 미치는 것으로 확인하였다.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2004년도 추계학술대회 논문집
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• pp.756-759
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• 2004

We present a piezoelectric actuator using stiffness control and stroke amplification mechanism in order to make large lateral displacement. In this work, we suggest stiffness control approach that generates lateral displacement by increasing the vertical stiffness and reducing the lateral stiffness using additional structure. In addition, an additional structure of a serpentine spring amplifies the lateral displacement like leverage structure. The suggested lateral PZT actuator (bellows actuator) consists of serpentine spring and PZT/electrode layer which is located at the edge of the serpentine spring. The edge of the serpentine spring prevents the vertical motion of PZT layer, while the other edge of the serpentine spring makes stroke amplification like leverage structure. We have determined dimensions of the bellows actuator using ANSYS simulation. Length, width and thickness of PZT layer are 135$\mu$m, 20$\mu$m and 0.4$\mu$m, respectively. Dimensions of the silicon serpentine spring are thickness of 25$\mu$m, length of 300$\mu$m, and width of 5$\mu$m. The bellows actuator has been fabricated by SOI wafer with 25$\mu$m-top silicon and 1$\mu$m-buried oxide layer. The bellows actuator shows the maximum 3.93$\pm$0.2$\mu$m lateral displacement at 16V with 1Hz sinusoidal voltage input. In the frequency response test, the fabricated bellows actuator showed consistent displacement from 1Hz to 1kHz at 10V. From experimental study, we found the bellows actuator using thin film PZT and silicon serpentine spring generated mainly laterally displacement not vertical displacement at 16V, and serpentine spring played role of stroke amplification.