• 한국태양에너지학회:학술대회논문집
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• 2009.11a
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• pp.367-370
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• 2009

It is important to reduce a reflection of light as a solar cell is device that directly converts the energy of solar radiation to electrical energy in oder to improve efficiency of solar cells. The antireflection coating has proven effective in providing substantial increase in solar cell efficiency. This paper investigates the formation of thin film PSi(porous silicon) layer on the surface of crystalline silicon substrates without other ARC(antirefiection coating) layers. On the other hand the formation of $SO_{2}/SiN_x$ ARC layers on the surface of crystalline silicon substrates. After that, the structure of PSi and $SO_2/SiN_x$ ARC was investigated by SEM and reflectance. The formation of PSi layer and $SO_{2}/SiN_x$ ARC layers on the textured silicon wafer result about 5% in the wavelength region from 0.4 to $1.0{\mu}m$. It is achieved on the textured crystalline silicon solar cell that each efficiency is 14.43%, 16.01%.

• Journal of the Institute of Electronics Engineers of Korea TE
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• v.39 no.4
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• pp.335-340
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• 2002

In this paper, the stress induced leakage currents of thin silicon oxides is investigated in the ULSI implementation with nano structure transistors. The stress and transient currents associated with the on and off time of applied voltage were used to measure the distribution of high voltage stress induced traps in thin silicon oxide films. The stress and transient currents were due to the charging and discharging of traps generated by high stress voltage in the silicon oxides. The transient current was caused by the tunnel charging and discharging of the stress generated traps nearby two interfaces. The stress induced leakage current will affect data retention in electrically erasable programmable read only memories. The oxide current for the thickness dependence of stress current, transient current, and stress induced leakage currents has been measured in oxides with thicknesses between 113.4${\AA}$ and 814${\AA}$, which have the gate area $10^3cm^2$. The stress induced leakage currents will affect data retention and the stress current, transient current is used to estimate to fundamental limitations on oxide thicknesses.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05c
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• pp.83-87
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• 2002

Plasma enhanced chemical vapor deposited (PECVD) silicon nitride ($SiN_X$) is widely used as a gate dielectric material for the hydrogenated amorphous silicon(a-Si:H) thin film transistors (TFT's). We investigated $SiN_X$ films were deposited PECVD at low temperature ($300^{\circ}C$). The reaction gases were used pure nitrogen and a helium diluted of silane gas(20% $SiH_4$, 80% He). Experimental investigations were carried out with the variation of $N_2/SiH_4$ flow ratios from 3 to 50 and the rf power of 200 W. This article presents the $SiN_X$ gate dielectric studies in terms of deposition rate, hydrogen content, etch rate and C-V, leakage current density characteristics for the gate dielectric layer of thin film transistor applications. Electrical properties were analyzed through high frequency (1MHz) C-V and current-voltage (I-V) measurements. The thickness and the refractive index on the films were measured by ellipsometry and chemical bonds were determined by using an FT-IR equipment.

• Applied Chemistry for Engineering
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• v.19 no.2
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• pp.236-241
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• 2008

The possibility of silicon oxidation through the aerial-diffusion of active oxygen species has been evaluated. The species originate from the surface of $TiO_2$ exposed by UV. Among process parameters such as UV intensity, substrate temperature and chamber pressure with oxygen, UV intensity was a major parameter to the influence on the oxide growth rate. When 1 kW high pressure Hg lamp was used as a UV source, the growth rate of silicon oxide was 8 times as faster as that of a 60 W BLB lamp. However, as the chamber pressure increased, the growth rate was declined due to the suppression of aerial diffusion of active oxygen species. According to the results, it could be confirmed that the aerial-diffusion of active oxygen species from UV-irradiated photocatalytic surface can be applied to a new method for preparing an ultra-thin silicon oxide at the range of relatively low temperature.

• Journal of Convergence for Information Technology
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• v.9 no.3
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• pp.75-81
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• 2019

In this work, we investigated a low temperature polycrystalline silicon (LTPS) thin film transistors fabrication process on polymer layers. Dehydrogenation and activation processes were performed by a furnace annealing at a temperature of $430^{\circ}C$ for 2 hr. The crystallization of amorphous silicon films was formed by excimer laser annealing (ELA) method. The p-type device performance, fabricated by polycrystalline silicon (poly-Si) films, shows a very good performance with field effect mobility of $77cm^2/V{\cdot}s$ and on/off ratio current ratio > $10^7$. We believe that the poly-Si formed by a LTPS process may be well suited for fabrication of poly-Si TFTs for bendable panel displays such as AMOLED that require circuit integration.

• Korean Journal of Metals and Materials
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• v.49 no.9
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• pp.732-738
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• 2011

Silicon oxide thin films were deposited by using a plasma-enhanced chemical-vapor deposition technique to investigate the light emission properties. The photoluminescence characteristics were divided into two categories along the relative ratio of the flow rates of $SiH_4$ and $N_2O$ source gases, which show light emission in the broad/visible range and a light emission peak at 380 nm. We attribute the broad/visible light emission and the light emission peak to the quantum confinement effect of nanocrystalline silicon and the Si=O defects, respectively. Changes in the photoluminescence spectra were observed after the post-annealing processes. The photoluminescence spectra of the broad light emission in the visible range shifted to the long wavelength and were saturated above an annealing temperature of $900^{\circ}C$ or after 1 hour annealing at $970^{\circ}C$. However, the position of the light emission peak at 380 nm did not change at all after the post-annealing processes. The light emission intensities at 380 nm initially increased, and decreased at annealing temperatures above $700^{\circ}C$ or after 1 hour annealing at $700^{\circ}C$. The photoluminescence behaviors after the annealing processes can be explained bythe size change of the nanocrystalline silicon and the density change of Si=O defect in the films, respectively. These results support the possibility of using a silicon-based light source for Si-optoelectronic integrated circuits and/or display devices.

• Proceedings of the Materials Research Society of Korea Conference
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• 2009.05a
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• pp.52.1-52.1
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• 2009

Cupric oxide (CuO) is a p-type semiconductor with band gap of ~1.7 eV and reported to be suitable for catalysis, lithium-copper oxide electrochemical cells, and gas sensors applications. The nanoparticles, plates and nanowires of CuO were found sensing to NO2, H2S and CO. In this work, we report about the comparison about hydrogen sensing of nano thin film and nanowires structured CuO deposited on single-walled carbon nanotubes (SWNTs). The thin film and nanowires are synthesized by deposition of Cu on different substrate followed by oxidation process. Nano thin films of CuO are deposited on thermally oxidized silicon substrate, whereas nanowires are synthesized by using a porous thin film of SWNTs as substrate. The hydrogen sensing properties of synthesized materials are investigated. The results showed that nanowires cupric oxide deposited on SWNTs showed higher sensitivity to hydrogen than those of nano thin film CuO did.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.34 no.1
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• pp.33-38
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• 2021

Using facing target magnetron sputtering (FTMS) with a graphite target source, carbon nitride thin films were deposited on silicon and glass substrates at different substrate temperatures to confirm the tribological, electrical, and structural properties of thin films. The substrate temperatures were room temperature, 150℃, and 300℃. The tribology and electrical properties of the carbon nitride thin films were measured as the substrate temperature increased, and a study on the relation between these results and structural properties was conducted. The results show that the increase in the substrate temperature during the fabrication of the carbon nitride thin films increased the hardness and elastic modulus values, the critical load value was increased, and the residual stress value was reduced. Moreover, the increase in the substrate temperature during thin-film deposition was attributed to the improvement in the electrical properties of carbon nitride thin film.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05b
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• pp.66-69
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• 2002

This paper presents deposition and characterizations of microcrystalline silicon$({\mu}c-Si:H)$ films prepared by hot wire chemical vapor deposition at substrate temperature below $300^{\circ}C$. The $SiH_{4}$ concentration$[F(SiH_{4})/F(SiH_{4})+F(H_{2})]$ is critical parameter for the formation of Si films with microcrystalline phase. At 6% of silane concentration, deposited intrinsic ${\mu}c-Si:H$ films shows sufficiently low dark conductivity and high photo sensitivity for solar cell applications. P-type ${\mu}c-Si:H$ films deposited by Hot-Wire CVD also shows good electrical properties by varying the rate of $B_{2}H_{6}$ to $SiH_{4}$ gas. The solar cells with structure of Al/nip ${\mu}c-Si:H$/TCO/glass was fabricated with single chamber Hot-Wire CVD. About 3% solar efficiency was obtained and applicability of HWCVD for thin film solar cells was proven in this research.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.205-207
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• 2008

The new process for hybrid silicon thin film transistor (TFT) using DPSS laser has been developed for realizing both low-temperature poly-Si (LTPS) TFT and a-Si:H TFT on the same substrate as a backplane of active matrix liquid crystal display. LTPS TFTs are integrated on the peripheral area of the panel for gate driver integrated circuit and a-Si:H TFTs are used as a switching device for pixel in the active area. The technology has been developed based on the current a-Si:H TFT fabrication process without introducing ion-doping and activation process and the field effect mobility of $4{\sim}5\;cm^2/V{\cdot}s$ and $0.5\;cm^2/V{\cdot}s$ for each TFT was obtained. The low power consumption, high reliability, and low photosensitivity are realized compared with amorphous silicon gate driver circuit and are demonstrated on the 14.1 inch WXGA+ ($1440{\times}900$) LCD Panel.