• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.12
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• pp.2202-2207
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• 2007

The present article investigates experimentally and theoretically thermal and optical characteristics of thin film structures through measurement of thermal conductivity of Pyrex 7740 and reflectance in silicon thin film. The $3{\omega}$ method is used to measure thermal conductivity of very thin film with high accuracy and the optical characteristics in thin films are studied to examine the influence of incidence angle of light on reflectance by using the CTM(Characteristics Transmission Method) and the 633 nm He-Ne laser reflectance measurement system. It is found that the estimated reflectance of silicon show good agreement with experimental data. In particular, the present study solves the EPRT(Equation of Phonon Radiative Transport) which is based on Boltzmann transport equation for predicting thermal conductivity of nanoscale film structures. From the results, the measured thermal conductivity is in good agreement with the previous published data. Moreover, thermal conductivities are estimated for different film thickness. It indicates that as film thickness decreases, thermal conductivity decreases substantially due to internal scattering.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.480.1-480.1
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• 2014

In this study, we suggest the new emitter formation applied solid phase epitaxy (SPE) growth process using rapid thermal process (RTP). Preferentially, we describe the SPE growth of intrinsic a-Si thin film through RTP heat treatment by radio-frequency plasma-enhanced chemical vapor deposition (RF-PECVD). Phase transition of intrinsic a-Si thin films were taken place under $600^{\circ}C$ for 5 min annealing condition measured by spectroscopic ellipsometer (SE) applied to effective medium approximation (EMA). We confirmed the SPE growth using high resolution transmission electron microscope (HR-TEM) analysis. Similarly, phase transition of P doped a-Si thin films were arisen $700^{\circ}C$ for 1 min, however, crystallinity is lower than intrinsic a-Si thin films. It is referable to the interference of the dopant. Based on this, we fabricated 16.7% solar cell to apply emitter layer formed SPE growth of P doped a-Si thin films using RTP. We considered that is a relative short process time compare to make the phosphorus emitter such as diffusion using furnace. Also, it is causing process simplification that can be omitted phosphorus silicate glass (PSG) removal and edge isolation process.

• Current Photovoltaic Research
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• v.1 no.1
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• pp.27-32
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• 2013

We investigated the growth mechanism of amorphous-phase Si thin films in order to improve the film characteristics and circumvent photo-degradation effects by implementation of hot-wire chemical vapor deposition. Amorphous silicon thin films grown in a silane/hydrogen mixture can be decomposed by a resistive heat filament. The structural properties were observed by Raman spectroscopy, FTIR, SEM, and TEM. The electrical properties of the films were measured by photo-conductivity, dark-conductivity, and photo-sensitivity. The contents of Si-H and $Si-H_n$ bonds were measured to be 19.79 and 9.96% respectively, at a hydrogen flow rate of 5.5 sccm, respectively. The thin film has photo-sensitivity of $2.2{\times}10^5$ without a crystalline volume fraction. The catalyst behavior of the hot-wire to decompose the chemical precursors by an electron tunneling effect depends strongly on the hydrogen mixture rate and an amorphous Si thin film is formed from atomic relaxation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.489-490
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• 2005

We studied the nematic liquid crystal (NLC) aligning capabilities using the new alignment material of the SiC (Silicon Carbide) thin film. The SiC thin film exhibits good chemical and thermal stability. The good thermal and chemical stability makes SiC an attractive candidate for electronic applications. A vertical alignment of nematic liquid crystal by ion beam exposure on the SiC thin film surface was achieved. The about $87^{\circ}$ of stable pretilt angle was achieved at the range from $30^{\circ}$ to $45^{\circ}$ of incident angle. The good LC alignment is main-tained by the ion beam alignment method on the SiC thin film surface at high annealing temperatures up to 300.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.1320-1322
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• 2005

Microcrystalline silicon films were deposited on glass substrate by using plasma-enhanced chemical vapor deposition (PECVD) method. The crystalline volume fraction was estimated by means of Raman spectrometer with argon laser as light source. The high hydrogen dilution of silane gas was used for increase in content of crystal silicon phase.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.727-730
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• 2003

Thin tin oxide film with nano-size particle was prepared on silicon substrate by hydrothermal synthetic method and successive sol-gel spin coating method. The fabrication method of tin oxide film with ultrafine nano-size crystalline structure was tried to be applied to fabrication of micro gas sensor array on silicon substrate. The tin oxide film on silicon substrate was well patterned by chemical etching upto 5${\mu}{\textrm}{m}$width and showed very uniform flatness. The tin oxide film preparation method and patterning method were successfully applied to newly proposed 2-dimensional micro sensor fabrication.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1994.11a
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• pp.78-81
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• 1994

The Photovoltaics(PV) industry has been evolving over the last 30 years and expanding because of a rising demand for clean and safe energy. Crystalline silicon solar cells will have increased performance and reduced cost in the future. In this paper solution growth process used to fabricate polycrystalline silicon thin film is considered.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.5 no.1
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• pp.37-43
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• 1995

The proper choice of the solvent is a prerequisite for solution growth of silicon. In the present work, the temperature to dissolve at least 1 atomic% silicon was calculated in various molten solvents.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.426.1-426.1
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• 2016

We report high work function Aluminum doped zinc oxide (AZO) films as insertion layer as a function of O2 flow rate between transparent conducting oxides (TCO) and hydrogenated amorphous silicon oxide (a-SiOx:H) layer to improve open circuit voltage (Voc) and fill factor (FF) for high efficiency thin film solar cell. However, amorphous silicon (a-Si:H) solar cells exhibit poor fill factors due to a Schottky barrier like impedance at the interface between a-SiOx:H windows and TCO. The impedance is caused by an increasing mismatch between the work function of TCO and that of p-type a-SiOx:H. In this study, we report on the silicon thin film solar cell by using as insertion layer of O2 reactive AZO films between TCO and p-type a-SiOx:H. Significant efficiency enhancement was demonstrated by using high work-function layers (4.95 eV at O2=2 sccm) for engineering the work function at the key interfaces to raise FF as well as Voc. Therefore, we can be obtained the conversion efficiency of 7 % at 13mA/cm2 of the current density (Jsc) and 63.35 % of FF.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.305-308
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• 2004

We present a novel process for the ultra low temperature (<150$^{\circ}C$) polycrystalline silicon (ULTPS) TFT for the flexible display applications on the plastic substrate. The sequential lateral solidification (SLS) was used for the crystallization of the amorphous silicon film deposited by rf magnetron sputtering, resulting in high mobility polycrystalline silicon (poly-Si) film. The gate dielectric was composed of thin $SiO_2$ formed by plasma oxidation and $Al_2O_3$ deposited by plasma enhanced atomic layer deposition. The breakdown field of gate dielectric on poly-Si film showed above 6.3 MV/cm. Laser activation reduced the source/drain resistance below 200 ${\Omega}$/ㅁ for n layer and 400 ${\Omega}$/ㅁ for p layer. The fabricated ULTPS TFT shows excellent performance with mobilities of 114 $cm^2$/Vs (nMOS) and 42 $cm^2$/Vs (pMOS), on/off current ratios of 4.20${\times}10^6$ (nMOS) and 5.7${\times}10^5$ (PMOS).