• Title/Summary/Keyword: Silicon substrate

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Strong Red Photoluminescence from Nano-porous Silicon Formed on Fe-Contaminated Silicon Substrate

  • Kim, Dong-Lyeul;Lee, Dong-Yul;Bae, In-Ho
    • Transactions on Electrical and Electronic Materials
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    • v.5 no.5
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    • pp.194-198
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    • 2004
  • The influences of the deep-level concentration of p-type Si substrates on the optical properties of nano-porous silicon (PS) are investigated by deep level transient spectroscopy (DLTS) and photoluminescence (PL). Utilizing a Si substrate with Fe contaminations significantly enhanced the PL intensity of PS. All the PS samples formed on Fe-contaminated silicon substrates had stronger PL yield than that of reference PS without any intentional Fe contamination but the emission peak is not significantly changed. For the PS 1000 sample with Fe contamination of 1,000 ppb, the maximum PL intensity showed about ten times stronger PL than that of the reference PS sample. From PL and DLTS results, the PL efficiency strongly depends on the Fe-related trap concentration in Si substrates.

Etch Rate of Oxide Grown on Silicon Implanted with Different Ion Implantation Conditions prior to Oxidation

  • Joung, Yang-Hee;Kang, Seong-Jun
    • Journal of information and communication convergence engineering
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    • v.1 no.2
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    • pp.67-69
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    • 2003
  • The experimental studies for the etch properties of the oxide grown on silicon substrate, which is in diluted hydrogen fluoride (HF) solution, are presented. Using different ion implantation dosages, dopants and energies, silicon substrate was implanted. The wet etching in diluted HF solution is used as a mean of wafer cleaning at various steps of VLSI processing. It is shown that the wet etch rate of oxide grown on various implanted silicon substrates is a strong function of ion implantation dopants, dosages and energies. This phenomenon has never been reported before. This paper shows that the difference of wet etch rate of oxide by ion implantation conditions is attributed to the kinds and volumes of dopants which was diffused out into $SiO_2$ from implanted silicon during thermal oxidation.

The Effect of Geometric Shape of Amorphous Silicon on the MILC Growth Rate (MILC 성장 속도에 비정질 실리콘의 기하학적 형상이 미치는 영향)

  • Kim Young-Su;Kim Min-Sun;Joo Seung-Ki
    • Korean Journal of Materials Research
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    • v.14 no.7
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    • pp.477-481
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    • 2004
  • High quality polycrystalline silicon is very critical part of the high quality thin film transistor(TFT) for display devices. Metal induced lateral crystallization(MILC) is one of the most successful technologies to crystallize the amorphous silicon at low temperature(below $550^{\circ}C$) and uses conventional and large glass substrate. In this study, we observed that the MILC behavior changed with abrupt variation of the amorphous silicon active pattern width. We explained these phenomena with the novel MILC mechanism model. The 10 nm thick Ni layers were deposited on the glass substrate having various amorphous silicon patterns. Then, we annealed the sample at $550^{\circ}C$ with rapid thermal annealing(RTA) apparatus and measured the crystallized length by optical microscope. When MILC progress from narrow-width-area(the width was $w_2$) to wide-width-area(the width was $w_1$), the MILC rate decreased dramatically and was not changed for several hours(incubation time). Also the incubation time increased as the ratio, $w_1/w_2$, get larger. We can explain these phenomena with the tensile stress that was caused by volume shrinkage due to the phase transformation from amorphous silicon to crystalline silicon.

Epitaxial growth of silicon thin films on insulating ($CeO_2$/Si) substrates (절연체 ($CeO_2$/Si)위에 성장된 실리콘 박막의 특성 연구)

  • 양지훈;문병식;김관표;김종걸;정동근;노용한;박종윤
    • Journal of the Korean Vacuum Society
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    • v.8 no.3B
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    • pp.322-326
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    • 1999
  • We have investigated the growing process of a silicon film on the $CeO_2/Si$ surface. The silicon was deposited by using electron beam deposition method. The $CeO_2$(111) film was grown on a (111)-oriented silicon substrate at $700^{\circ}C$ at oxygen [partial pressure of $5\times10^{-5}$ Torr. To investigate the condition of epitaxial growth of si films on the $CeO_2/Si$ substrate, we deposited Si at various temperature니 The overlayer silicon was characterized by using x-ray diffraction(XRD). double crystal x-ray diffraction (DCXRD), and transmission electron microscopy (TEM). At temperature higher than $690^{\circ}C$, $CeO_2$ layer was observed at the $CeO_2/Si$ interface, which was formed by chemical reaction with silicon and oxygen dissociated from $CeO_2$. When silicon was deposited on the $CeO_2/Si$ at $620^{\circ}C$, silicon grew epitaxially along the (111)-direction.

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EFFECT OF $SiF_4$ADDITION ON THE STRUCTURES OF SILICON FILMS DEPOSITED AT LOW TEMPERATURE BY REMOTE PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION

  • Xiaodong Li;Park, Young-Bae;Kim, Dong-Hwan;Rhee, Shi-Woo
    • Journal of the Korean Vacuum Society
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    • v.4 no.S2
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    • pp.64-68
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    • 1995
  • Silicon films were deposited at $430^{\circ}C$ by remote plasma chemical vapor deposition(RPECVD) with a gas mixture of $Si_2H_6/SiF_4/H_2$. The silicon films deposited without and with $SiF_4$ were characterized using atomic force microscopy(AFM), transmission electron microscopy(TEM) and X-ray diffraction(XRD). Both silicon films have the same rugged surface morphology, but, the silicon film deposited with $SiF_4$ exhibits more rugged. The silicon film deposited without $SiF_4$ is amorphous, whereas the silicon film deposited with $SiF_4$ is polycrystalline with very small needle-like grains which are perpendicular to the substrate and uniformly distributed in the thickness of the film. The silicon film deposited with $SiF_4$ was found to have a preferred orientation along the growth direction with the<110> of the film parallel to the <111> of the substrate. The effect of $SiF_4$ during RPECVD was discussed.

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OPTIMAL DESIGN AND FABRICATION OF SPIRAL INDUCTOR ON SILICON SUBSTRATE (실리콘 기판상에서 나선형 인덕터의 최적설계 및 제작)

  • 서종삼;박종욱이성희김영석
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.645-648
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    • 1998
  • We used a three-dimensional inductance extraction program, Fasthenry for optimal design of the spiral inductors on silicon substrate. The inductance and quality factor of the spiral inductors with various design parameters were calculated so that the optimal parameter value was determined. The spiral inductors then were fabricated using different foundary processes and were measured using the network analyzer and microwave probes. The pad and other parasitics of measurement system were de-embedded using the y-parameter calibration technique. the inductors fabricated using the LG 0.8um process and HP 0.5um process showed the quality factor of 5.8 and 3, respectively. Finally the equivalent circuit farameters of the spiral inductors on silicon substrate were extracted from the measurement data using the matlab.

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Double Resonance Perfect Absorption in a Dielectric Nanoparticle Array

  • Hong, Seokhyeon;Lee, Young Jin;Moon, Kihwan;Kwon, Soon-Hong
    • Current Optics and Photonics
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    • v.1 no.3
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    • pp.228-232
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    • 2017
  • We propose a reflector-type perfect absorber with double absorption lines using electric and magnetic dipoles of Mie resonances in an array of silicon nanospheres on a silver substrate. In the visible range, hundreds of nanometer-sized nanospheres show strong absorption lines up to 99%, which are enhanced by the interference between Mie scattering and reflections from the silver substrate. The air gap distance between the silicon particles and silver substrate controls this interference, and the absorption wavelengths can be controlled by adjusting the diameter of the silicon particles over the entire range of visible wavelengths. Additionally, our structure has a filling factor of 0.322 when the absorbance is nearly 100%.

Cyclic Capilary Electrophoresis Separator on Silicon Substrate with Synchronized Switching (실리콘 기판 위에서 구현된 회전형 전기영동분리기)

  • Jeong, Yong-Won;Kim, Bong-Hwan;Lee, Jun-Yeop;Cho, Gyeong-Yeon;Chang, Jun-Geun;Chun, Guk-Jin
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.11
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    • pp.640-648
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    • 2000
  • We have developed a synchronously switched cyclic capillary electrophoresis (CE) separator that is fabricated on a silicon substrate and glass containing reservoirs, Au electrode, and isolated channels. The advantage of a cyclic separator is the high resolution and ability to separate each sample to the designated reservoir from mixed samples. This approach makes it possible to reduce the supplied voltage and the total size. Another goal of this work is to introduce the methodolgy of electroosmosis flow(EOF) to silicon substrate and to separate DNA samples using a modified double-T injector.

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Substrate Temperature Dependence of Microcrystalline Silicon Thin Films by Combinatorial CVD Deposition

  • Kim, Yeonwon
    • Journal of the Korean institute of surface engineering
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    • v.48 no.3
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    • pp.126-130
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    • 2015
  • A high-pressure depletion method using plasma chemical vapor deposition (CVD) is often used to deposit hydrogenated microcrystalline silicon (${\mu}c-Si:H$) films of a low defect density at a high deposition rate. To understand proper deposition conditions of ${\mu}c-Si:H$ films for a high-pressure depletion method, Si films were deposited in a combinatorial way using a multi-hollow discharge plasma CVD method. In this paper the substrate temperature dependence of ${\mu}c-Si:H$ film properties are demonstrated. The higher substrate temperature brings about the higher deposition rate, and the process window of device quality ${\mu}c-Si:H$ films becomes wider until $200^{\circ}C$. This is attributed to competitive reactions between Si etching by H atoms and Si deposition.

Performance Comparison of Two Types of Silicon Avalanche Photodetectors Based on N-well/P-substrate and P+/N-well Junctions Fabricated With Standard CMOS Technology

  • Lee, Myung-Jae;Choi, Woo-Young
    • Journal of the Optical Society of Korea
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    • v.15 no.1
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    • pp.1-3
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    • 2011
  • We characterize and analyze silicon avalanche photodetectors (APDs) fabricated with standard complementary metal-oxide-semiconductor (CMOS) technology. Current characteristics, responsivity, avalanche gain, and photodetection bandwidth of CMOS-APDs based on two types of PN junctions, N-well/P-substrate and $P^+$/N-well junctions, are compared and analyzed. It is demonstrated that the CMOS-APD using the $P^+$/N-well junction has higher responsivity as well as higher photodetection bandwidth than N-well/P-substrate. In addition, the important factors influencing CMOS-APD performance are clarified from this investigation.