• Title/Summary/Keyword: Silicon power

Search Result 1,044, Processing Time 0.031 seconds

Fabrication of surface-enhanced Raman scattering substrate using black silicon layer manufactured through reactive ion etching (RIE 공정으로 제조된 블랙 실리콘(Black Silicon) 층을 사용한 표면 증강 라만 산란 기판 제작)

  • Kim, Hyeong Ju;Kim, Bonghwan;Lee, Dongin;Lee, Bong-Hee;Cho, Chanseob
    • Journal of Sensor Science and Technology
    • /
    • v.30 no.4
    • /
    • pp.267-272
    • /
    • 2021
  • In this study, Ag was deposited to investigate its applicability as a surface-enhanced Raman scattering substrate after forming a grass-type black silicon structure through maskless reactive ion etching. Grass-structured black silicon with heights of 2 - 7 ㎛ was formed at radio-frequency (RF) power of 150 - 170 W. The process pressure was 250 mTorr, the O2/SF6 gas ratio was 15/37.5, and the processing time was 10 - 20 min. When the processing time was increased by more than 20 min, the self-masking of SixOyFz did not occur, and the black silicon structure was therefore not formed. Raman response characteristics were measured based on the Ag thickness deposited on a black silicon substrate. As the Ag thickness increased, the characteristic peak intensity increased. When the Ag thickness deposited on the black silicon substrate increased from 40 to 80 nm, the Raman response intensity at a Raman wavelength of 1507 / cm increased from 8.2 × 103 to 25 × 103 cps. When the Ag thickness was 150 nm, the increase declined to 30 × 103 cps and showed a saturation tendency. When the RF power increased from 150 to 170 W, the response intensity at a 1507/cm Raman wavelength slightly increased from 30 × 103 to 33 × 103 cps. However, when the RF power was 200 W, the Raman response intensity decreased significantly to 6.2 × 103 cps.

Recent Overview on Power Semiconductor Devices and Package Module Technology (차세대 전력반도체 소자 및 패키지 접합 기술)

  • Kim, Kyoung-Ho;Choa, Sung-Hoon
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.26 no.3
    • /
    • pp.15-22
    • /
    • 2019
  • In these days, importance of the power electronic devices and modules keeps increasing due to electric vehicles and energy saving requirements. However, current silicon-based power devices showed several limitations. Therefore, wide band gap (WBG) semiconductors such as SiC, GaN, and $Ga_2O_3$ have been developed to replace the silicon power devices. WBG devices show superior performances in terms of device operation in harsh environments such as higher temperatures, voltages and switching speed than silicon-based technology. In power devices, the reliability of the devices and module package is the critically important to guarantee the normal operation and lifetime of the devices. In this paper, we reviewed the recent trends of the power devices based on WBG semiconductors as well as expected future technology. We also presented an overview of the recent package module and fabrication technologies such as direct bonded copper and active metal brazing technology. In addition, the recent heat management technologies of the power modules, which should be improved due to the increased power density in high temperature environments, are described.

A Study of the Relationship Analysis of Power Conversion and Changed Capacitance in the Depletion Region of Silicon Solar Cell

  • Kim, Do-Kyeong;Oh, Yeong-Jun;Kim, Sang-Hyun;Hong, Kyeong-Jin;Jung, Haeng-Yeon;Kim, Hoy-Jin;Jeon, Myeong-Seok
    • Transactions on Electrical and Electronic Materials
    • /
    • v.14 no.4
    • /
    • pp.177-181
    • /
    • 2013
  • In this paper, silicon solar cells are analyzed regarding power conversion efficiency by changed capacitance in the depletion region. For the capacitance control in the depletion region of silicon solar cell was applied for 10, 20, 40, 80, 160 and 320 Hz frequency band character and alternating current(AC) voltage with square wave of 0.2~1.4 V. Academically, symmetry formation of positive and negative change of the p-n junction is similar to the physical effect of capacitance. According to the experiment result, because input of square wave with alternating current(AC) voltage could be observed to changed capacitance effect by indirectly method through non-linear power conversion (Voltage-Current) output. In addition, when input alternating current(AC) voltage in the silicon solar cell, changed capacitance of depletion region with the forward bias condition and reverse bias condition gave a direct effect to the charge mobility.

A Study on the Characteristics of Silicon Direct Bonding by Hydrogen Plasma Treatment (수소 플라즈마 처리에 의한 실리콘 직접접합 특성에 관한 연구)

  • Choe, U-Beom;Ju, Cheol-Min;Kim, Dong-Nam;Seong, Man-Yeong
    • The Transactions of the Korean Institute of Electrical Engineers C
    • /
    • v.49 no.7
    • /
    • pp.424-432
    • /
    • 2000
  • The plasma surface treatment, using hydrogen gas, of the silicon wafer was investigated as a pretreatment for the application to silicon-on-insulator (SOI) wafers using the silicon direct bonding technique. The chemical reactions of hydrogen plasma with surfaces were used for both the surface activation and the removal of surface contaminants. As a result of exposure of silicon wafer to the plasma, an active oxide layer was formed on the surface, which was rendered hydrophilic. The surface roughness and morphology were estimated as functions of plasma exposing time as well as of power. The surface became smoother with decreased incident hydrogen ion flux by reducing plasma exposing time and power. This process was very effective to reduce the carbon contaminants on the silicon surface, which was responsible for a high initial surface energy. The initial surface energy measured by the crack propagation method was 506 mJ/m2, which was up to about three times higher than that of a conventional RCA cleaning method.

  • PDF

Primary Side Current Control Method in Dc-to-Dc Converters for LED Lighting (LED조명을 위한 직류-직류 변환기의 일차 측 전류 제어 기법)

  • Kwon, O.H.;Hong, J.P.;Qu, Wanyuan;Son, Y.S.;Choi, Y.H.;Choi, B.C.
    • Proceedings of the KIPE Conference
    • /
    • 2011.07a
    • /
    • pp.346-347
    • /
    • 2011
  • 본 논문에서는 정전류 LED조명 구동을 위한 일차측 전류 제어의 새로운 기법을 제안한다. 일정한 온-타임으로 동작하는 경계 모드(Critical Mode) 플라이백 타입으로 우수한 역률을 달성하였고, 의사 공진(Quasi-resonant) 동작으로 스위칭 손실을 최소화 하였다. 본문에서 LED전류가 5% 이하로 정전류 제어되는 9W급 플라이백 타입의 일차 측 전류 제어 기법을 실험으로 검증한다.

  • PDF

A Study on the Electrical Properties of Plasma Silicon Nitride (플라즈마 실리콘 질화막의 전기적 특성에 관한 연구)

  • 주현성;주승기
    • Journal of the Korean institute of surface engineering
    • /
    • v.22 no.4
    • /
    • pp.215-220
    • /
    • 1989
  • Silicon Nitride whose thickness is about $100\AA$by the ellipsometer was successfully formed by the Plasma reaction. Nitrogen Plasma was formed by applying the 200KHz, 500Watt power between the two electroes and nitridation of silicon was carried out directly on the top of the silicon wafer. Thus Silicon Nitride formed was oxidized to from oxynitrides and their electrical characterlstice were analyzed by measuring I-V curves and capacitances. Through ESCA depth profiles, the chemical composition changes before and after the oxidation wers analyzed.

  • PDF

A Study on Characteristics of Microcrystalline-silicon Films Fabricated by PECVD Method (플라즈마 화학증착법으로 제작한 미세결정질 실리콘 박막 특성에 관한 연구)

  • Lee, Ho-Nyeon;Lee, Jong-Ha;Lee, Byoung-Wook;Kim, Chang-Kyo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.21 no.9
    • /
    • pp.848-852
    • /
    • 2008
  • Characteristics of microcrystalline-silicon thin-films deposited by plasma-enhanced chemical-vapor deposition (PECVD) method were studied. There were optimum values of RF power density and $H_2$ dilution ratio $(H_2/(SiH_4+H_2))$; maximum grain size of about 35 nm was obtained at substrate temperature of 250 $^{\circ}C$ with RF power density of 1.1 W/$cm^2$ and $H_2$ dilution ratio of 0.91. Larger grain was obtained with higher substrate temperature up to 350 $^{\circ}C$. Grain size dependence on RF power density and $H_2$ dilution ratio could be explained by etching effects of hydrogen ions and changes of species of reactive precursors on growing surface. Surface-mobility activation of reactive precursors by temperature could be a reason of grain-size dependence on the substrate temperature. Microcrystalline-silicon thin-films that could be used for flat-panel electronics such as active-matrix organic-light-emitting-diodes are expected to be fabricated successfully using these results.

Characteristics Analysis and Comparison of Careless and Slotless BLDC Motor used in Digital Lightening Processor Motor with Air-Dynamic Bearing (공기 동압 베어링을 갖는 디지털 라이트닝 프로세서 모터용 코어리스 및 슬롯리스 BLDC 모터의 특성 분석 및 비교)

  • Yang, Iee-Woo;Kim, Young-Seok;Kim, Sang-Uk
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.56 no.6
    • /
    • pp.1039-1046
    • /
    • 2007
  • This paper presents the analysis for power consumption, mechanical vibration and acoustic noise characteristics of the Coreless and Slotless Brushless DC motor in Digital Lightening Processor(DLP) Motor with the Air-Dynamic Bearing. The Coreless BLDC motor has not the stator yoke as well as the stator slot to remove the unbalance force by the interaction between the stator yoke and Air-Dynamic Bearing clearance. The assembling tolerance and the processing error make the air-gap difference between the magnet and the stator yoke .which occurs the unbalanced electro-magnetic force in the Slotless BLDC motor. It imposes the air-dynamic bearing on the disturbance force and makes the Air-Dynamic Bearing vibrated and noised. Also, The attractive force between the magnet and the silicon steel stator yoke increases the power consumption. In this paper, the power consumption, mechanical vibration and acoustic noise of the Coreless BLDC motor and the Slotless BLDC motor with the silicon steel stator yoke are simulated, analyzed, and tested using the manufactured proto-type motors with Air-Dynamic bearing. The simulated and tested results present that the Coreless BLDC motor without the silicon steel stator yoke has the lower mechanical vibration and noise ,and lower power consumption than the Slotless BLDC motor with the silicon steel stator yoke in Digital Lightening Processor Motor with Air-Dynamic Bearing.

The Characteristics and Technical Trends of Power MOSFET (전력용 MOSFET의 특성 및 기술동향)

  • Bae, Jin-Yong;Kim, Yong
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.58 no.7
    • /
    • pp.1363-1374
    • /
    • 2009
  • This paper reviews the characteristics and technical trends in Power MOSFET technology that are leading to improvements in power loss for power electronic system. The silicon bipolar power transistor has been displaced by silicon power MOSFET's in low and high voltage system. The power electronic technology requires the marriage of power device technology with MOS-gated device and bipolar analog circuits. The technology challenges involved in combining power handling capability with finger gate, trench array, super junction structure, and SiC transistor are described, together with examples of solutions for telecommunications, motor control, and switch mode power supplies.

Voltage Optimization of Power Delivery Networks through Power Bump and TSV Placement in 3D ICs

  • Jang, Cheoljon;Chong, Jong-Wha
    • ETRI Journal
    • /
    • v.36 no.4
    • /
    • pp.643-653
    • /
    • 2014
  • To reduce interconnect delay and power consumption while improving chip performance, a three-dimensional integrated circuit (3D IC) has been developed with die-stacking and through-silicon via (TSV) techniques. The power supply problem is one of the essential challenges in 3D IC design because IR-drop caused by insufficient supply voltage in a 3D chip reduces the chip performance. In particular, power bumps and TSVs are placed to minimize IR-drop in a 3D power delivery network. In this paper, we propose a design methodology for 3D power delivery networks to minimize the number of power bumps and TSVs with optimum mesh structure and distribute voltage variation more uniformly by shifting the locations of power bumps and TSVs while satisfying IR-drop constraint. Simulation results show that our method can reduce the voltage variation by 29.7% on average while reducing the number of power bumps and TSVs by 76.2% and 15.4%, respectively.