• Title/Summary/Keyword: Silicon etching

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Simply Modified Biosensor for the Detection of Human IgG Based on Protein AModified Porous Silicon Interferometer

  • Park, Jae-Hyun;Koh, Young-Dae;Ko, Young-Chun;Sohn, Hong-Lae
    • Bulletin of the Korean Chemical Society
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    • v.30 no.7
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    • pp.1593-1597
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    • 2009
  • A biosensor has been developed based on induced wavelength shifts in the Fabry-Perot fringes in the visible reflection spectrum of appropriately derivatized thin films of porous silicon semiconductors. Porous silicon (PSi) was generated by an electrochemical etching of silicon wafer using two electrode configurations in aqueous ethanolic HF solution. Porous silicon displayed Fabry-Perot fringe patterns whose reflection maxima varied spatially across the porous silicon. The sensor system studied consisted of a mono layer of porous silicon modified with Protein A. The system was probed with various fragments of an aqueous Human Immunoglobin G (Ig G) analyte. The sensor operated by measurement of the Fabry-Perot fringes in the white light reflection spectrum from the porous silicon layer. Molecular binding was detected as a shift in wavelength of these fringes.

Variation of the Nanostructural and Optical Features of Porous Silicon with pH Conditions (pH 조건에 따른 기공성 실리콘의 나노구조 및 광학적 특성의 변화)

  • Kim, Hyo-Han;Cho, Nam-Hee
    • Journal of the Korean Ceramic Society
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    • v.50 no.4
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    • pp.294-300
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    • 2013
  • The effect of chemical treatments of porous silicon in organic solvents on its nanostructural and optical features was investigated. When the porous Si was dipped in the organic solvent with various PH values, the morphological, chemical, and structural properties of the porous silicon was sensitively affected by the chemical conditions of the solvents. The size of silicon nanocrystallites in the porous silicon decreased from 5.4 to 3.1 nm with increasing pH values from 1 to 14. After the samples were dipped in the organic solvents, the Si-O-H bonding intensity was increased while that of Si-H bonding decreased. Photoluminescence peaks shifted to a shorter wavelength region in the range of 583 to 735 nm as the pH value increased. PL intensity was affected by the size as well as the volume fraction of the nanocrystalline silicon in the porous silicon.

Nanoscale Pyramid Texture for High Efficiency Multi-Crystalline Silicon Solar Cells (고효율 다결정 실리콘 태양전지 제작을 위한 나노크기의 피라미드 텍스쳐 제작)

  • Heo, Jong;Park, Min-Joon;Jee, Hong sub;Kim, Jin Hyeok;Jeong, Chaehwan
    • Current Photovoltaic Research
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    • v.5 no.1
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    • pp.25-27
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    • 2017
  • Nanoscale textured black silicon has attracted intensive attention due to its great potential as applications in multicrystalline silicon-based solar cells. It absorbs sunlight over a broad range of wavelengths but introduces large recombination centers, non-uniform doping into cell. In this study, we present a metal-assisted chemical etching technique plus alkaline etching process to fabricate nanoscale pyramid structures with optimized condition. To make the structures, silver nanoparticles-loaded mc-Si wafer was submerged into $H_2O_2/HF$ solution first for nanohole texturing the wafer and textured wafer etched again with KOH solution for making nanoscale pyramid structures. The average reflectivity (350-1050 nm) is about 8.42% with anti-reflection coating.

Enhancement of Thermal Stability in Photoluminescence by Carbonization of Porous silicon (다공성실리콘의 탄화를 이용한 PL의 열적안정성 증진)

  • 최두진;서영제;전희준;박홍이;이덕희
    • Journal of the Korean Ceramic Society
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    • v.34 no.5
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    • pp.467-472
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    • 1997
  • Porous silicon was prepared by an anodic etching. The pore size was about 10 nm at an etching time of 20 sec and a current density of 20 mA/$\textrm{cm}^2$. The porous layer was composed of an micro-porous layer (0.6 ${\mu}{\textrm}{m}$) and a macro-porous layer (10 ${\mu}{\textrm}{m}$). Room temperature PL with maximum peak 6700$\AA$ appeared. The peak disappeared by an oxidation reaction when the porous silicon was heated to 100~20$0^{\circ}C$ in atmosphere. In order to avoid the oxidation a heat treatment was done in H2 atmosphere. The micro-pore and Si column, which formed quantum well, were collapsed by the high temperature. The PL maximum peak of heated sample was gradually red-shifted and showed about 300$\AA$ red-shift at 50$0^{\circ}C$. The intensity of PL was maintained to high temperatures in lower pressures. The porous Si was carbonized in C2H2+H2 gas in order to increase thermal stability. The carbonization of the porous Si prevented red-shift of the maximum PL peak caused by sintering effect at high temperatures, and the carbonized porous Si showed Pl signal at higher temperatures by above 20$0^{\circ}C$ than the sample in H2 atmosphere.

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Effect of the fixed oxide charge on the metal-oxide-silicon-on-insulator structures (metal-oxide-silicon-on-insulator 구조에서 고정 산화막 전하가 미치는 영향)

  • Jo, Yeong-Deuk;Kim, Ji-Hong;Cho, Dae-Hyung;Moon, Byung-Moo;Koh, Jung-Hyuk;Ha, Jae-Geun;Koo, Sang-Mo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.83-83
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    • 2008
  • Metal-oxide-silicon-on-insulator (MOSOI) structures were fabricated to study the effect caused by reactive ion etching (RIE) and sacrificial oxidation process on silicon-on-insulator (SOI) layer. The MOSOI capacitors with an etch-damaged SOI layer were characterized by capacitance-voltage (C-V) measurements and compared to the sacrificial oxidation treated samples and the reference samples without etching treatment. The measured C-V curves were compared to the numerical results from 2-dimensional (2-D) simulations. The measurements revealed that the profile of C-V curves significantly changes depending on the SOI surface condition of the MOSOI capacitors. The shift in the measured C-V curves, due to the difference of the fixed oxide charge ($Q_f$), together with the numerical simulation analysis and atomic force microscopy (AFM) analysis, allowed extracting the fixed oxide charges ($Q_f$) in the structures as well as 2-D carrier distribution profiles.

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Cost down thin film silicon substrate for layer transfer formation study (저가격 박막 실리콘 기판을 위한 단결정 실리콘 웨이퍼에 layer transfer 형성 연구)

  • Kwon, Jae-Hong;Kim, Dong-Seop;Lee, Soo-Hong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.04b
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    • pp.85-88
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    • 2004
  • Mono-crystalline silicon(mono-Si) is both abundant in our environment and an excellent material for Si device applications. However, single crystalline silicon solar cell has been considered to be expensive for terrestrial applications. For that reason, the last few years have seen very rapid progress in the research and development activities of layer transfer(LT) processes. Thin film Si layers which can be detached from a reusable mono-Si wafers served as a substrate for epitaxial growth. The epitaxial films have a very high efficiency potential. LT technology is a promising approach to reduce fabrication cost with high efficiency at large scale since expensive Si substrate can be recycled. Low quality Si can be used as a substrate. Therefore, we propose one of the major technologies on fabricating thin film Si substrate using a LT. In this paper, we study the LT method using the electrochemical etching(ECE) and solid edge.

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Development of textured ZnO:Al films for silicon thin film solar cells (실리콘 박막 태양전지용 텍스처링 ZnO:Al 박막 개발)

  • Cho, Jun-Sik;Kim, Young-Jin;Lee, Jeong-Chul;Park, Sang-Hyun;Song, Jin-Soo;Yoon, Kyoung-Hoon
    • 한국신재생에너지학회:학술대회논문집
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    • 2009.11a
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    • pp.349-349
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    • 2009
  • High quality ZnO:Al films were prepared on glass substrates by in-line RF magnetron sputtering and their surface morphologies were modified by wet-etching process in dilute acid solution to improve optical properties for application to silicon thin film solar cells as front electrode. The as-deposited films show a strong preferred orientation in [001] direction under our experimental conditions. A low resistivity below $5{\times}10^{-4}{\Omega}{\cdot}cm$ and high optical transmittance above 80% in a visible range are achieved in the films deposited at optimized conditions. After wet-etching, the surface morphologies of the films are changed dramatically depending on the deposition conditions, especially working pressure. The optical properties such as total/diffuse transmittance, haze and angular resolved distribution of light are varied significantly with the surface morphology feature, whereas the electrical properties are seldom changed. The cell performances of silicon thin film solar cells fabricated on the textured films are also evaluated in detail with comparison of commercial $SnO_2$:F films.

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Thermal Behavior of Flow Pattern Defect and Large Pit in Czochralski Silicon Crystals and Effects of Large Pit upon Device Yield (쵸크랄스키 Silicon 단결정의 Large Pit과 Flow Pattern defect의 열적 거동과 Large Pit의 소자 수율에의 영향)

  • Song, Yeong-Min;Mun, Yeong-Hui;Kim, Jong-O;Jo, Gi-Hyeon
    • Korean Journal of Materials Research
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    • v.11 no.9
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    • pp.781-785
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    • 2001
  • The thermal behavior of Flow Pattern Defect (FPD) and Large Pit (LP) in Czochralski Silicon crystal was investigated by applying high temperature annealing ($\geq$$1100^{\circ}C$) and non-agitated Secco etching. For evaluation of the effect of LP upon device performance/yield, commercial DRAM and ASIC devices were fabricated. The results indicated that high temperature annealing generates LPs whereas it decreases FPD density drastically. However, the origins of FPD and LP seemed to be quite different by not showing any correspondence to their density and the location of LP generation and FPD extinction. By not showing any difference between the performance/yield of devices whose design rule is larger than 0.35 $\mu\textrm{m}$, LP seemed not to have detrimental effects on the performance/yield.

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Electron Emission From Porous Poly-Silicon Nano-Device for Flat Panel Display (다결정 다공성 실리콘의 전계방출 특성)

  • Lee, Joo-Won;Kim, Hoon;Lee, Yun-Hi;Jang, Jin;Ju, Byeong-Kwon
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.4
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    • pp.330-335
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    • 2003
  • This paper reports the optimum structure of the vacuum packaged Porous poly-silicon Nano-Structured (PNS) emitter. The PNS layer was obtained by electrochemical etching process into polycrystalline silicon layer in a process controlled to anodizing condition. Current-voltage studies were carried out to optimize process condition of electron emission properties as a function of anodizing condition and top electrode thickness. Also, we measured in advance the electron emission properties as a function of substrate temperature because the vacuum packaged process was performed under the condition of high temperature ambient (430$^{\circ}C$). Auger Electron Spectrometer (AES) studies shows that Au as a top-electrode was diffused to PNS layer during temperature experiments. Thus, we optimized the thickness of top-electrode in order to make the vacuum package PNS emitter. As a result, the vacuum Packaged PNS emitter was successfully emitted by optimizing process.

A Study on the Characteristics of Silicon Micro-hole machining (단결정 실리콘 미세 홀 가공특성에 관한 연구)

  • Chae, Seung-Su;Lee, Sang-Min;Park, Hwi-Keun;Cho, Jun-Hyun;Lee, Jong-Chan;Heo, Chan
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.12 no.2
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    • pp.75-80
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    • 2013
  • Cathode is an essential component used in plasma etching process which is to make micro pattern on the silicon wafer. The currently used cathodes produce particles at the high temperature plasma etching process. To overcome this problem, a 'Silicon Only Cathode' was developed. This 'Silicon Only Cathode' requires manufacturing process changes due to the change of shapes, material features, and machining characteristics of work materials. This research investigates the small hole drilling process. The conclusion is that PCD drills with twist angles of $20^{\circ}$ and $25^{\circ}$ were tested for small hole drilling and the experimental results indicate that the drill with $25^{\circ}$ twist angle drill causes less thrust force.