• 제목/요약/키워드: Silicon double-layer dielectric

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절연막을 이용한 단면 표면조직화 결정질 실리콘 태양전지 (The Single-Side Textured Crystalline Silicon Solar Cell Using Dielectric Coating Layer)

  • 도겸선;박석기;명재민;유권종;송희은
    • 한국태양에너지학회:학술대회논문집
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    • 한국태양에너지학회 2011년도 추계학술발표대회 논문집
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    • pp.245-248
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    • 2011
  • Many researches have been carried out to improve light absorption in the crystalline silicon solar cell fabrication. The rear reflection is applied to increase the path length of light, resulting in the light absorption enhancement and thus the efficiency improvement mainly due to increase in short circuit current. In this paper, we manufactured the silicon solar cell using the mono crystalline silicon wafers with $156{\times}156mm^2$, 0.5~3.0 ${\Omega}{\cdot}cm$ of resistivity and p-type. After saw damage removal, the dielectric film ($SiN_x$)on the back surface was deposited, followed by surface texturing in the KOH solution. It resulted in single-side texturing wafer. Then the dielectric film was removed in the HF solution. The silicon wafers were doped with phosphorus by $POCl_3$ with the sheet resistance 50 ${\Omega}/{\Box}$ and then the silicon nitride was deposited on the front surface by the PECVD with 80nm thickness. The electrodes were formed by screen-printing with Ag and Al paste for front and back surface, respectively. The reflectance and transmittance for the single-sided and double-sided textured wafers were compared. The double-sided textured wafer showed higher reflectance and lower transmittance at the long wavelength region, compared to single-sided. The completed crystalline silicon solar cells with different back surface texture showed the conversion efficiency of 17.4% for the single sided and 17.3% for the double sided. The efficiency improvement with single-sided textured solar cell resulted from reflectance increase on back surface and light absorption enhancement.

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Gate Insulator 두께 가변에 따른 TFT소자의 전기적 특성 비교분석

  • 김기용;조재현;이준신
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 추계학술대회 논문집
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    • pp.39-39
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    • 2009
  • We fabricated p-channel TFTs based on poly Silicon. The 35nm thickness silicon dioxide layer structure got higher $I_{on}/I_{off}$ ratio, field-effect Mobility and output current than 10nm thickness. And 35nm layer showed low leakage current and threshold voltage. So, 35nm thickness silicon dioxide layer TFTs are faster reaction speed and lower power consumption than 10nm thickness.

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Fabrication of Double-Doped Magnetic Silica Nanospheres and Deposition of Thin Gold Layer

  • Park, Sang-Eun;Lee, Jea-Won;Haam, Seung-Joo;Lee, Sang-Wha
    • Bulletin of the Korean Chemical Society
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    • 제30권4호
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    • pp.869-872
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    • 2009
  • Double-doped magnetic particles that incorporated magnetites into both the surface and inside the silica cores were fabricated via the sol-gel reaction of citrate-stabilized magnetites with silicon alkoxide. Double-doped magnetic particles were easily fabricated and exhibited an higher magnetism in comparison to the singledoped magnetic particles that were prepared by the erosion of surface-deposited magneties from double-doped magentic particles. Thin gold layer was formed over magnetic silica nanospheres via nanoseed-mediated growth of gold clusters. The plasmon-derived absorption bands of double-doped magnetic silica-gold nanoshells were more broadened and shifted down by ca. 20 nm as compared to those of single-doped magnetic silicagold nanoshells, which were attributed to not only the surface scattering of incident light due to relatively rough surafce morphology, but also heterogeneous permittivity of dielectric cores due to surface-deposited magnetites.

Quantitative Analysis of Ultrathin SiO2 Interfacial Layer by AES Depth Profilitng

  • Soh, Ju-Won;Kim, Jong-Seok;Lee, Won-Jong
    • The Korean Journal of Ceramics
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    • 제1권1호
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    • pp.7-12
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    • 1995
  • When a $Ta_O_5$ dielectric film is deposited on a bare silicon, the growth of $SiO_2$ at the $Ta_O_5$/Si interface cannot be avoided. Even though the $SiO_2$ layer is ultrathin (a few nm), it has great effects on the electrical properties of the capacitor. The concentration depth profiles of the ultrathin interfacial $SiO_2$ and $SiO_2/Si_3N_4$ layers were obtained using an Auger electron spectroscopy (AES) equipped with a cylindrical mirror analyzer (CMA). These AES depth profiles were quantitatively analyzed by comparing with the theoretical depth profiles which were obtained by considering the inelastic mean free path of Auger electrons and the angular acceptance function of CMA. The direct measurement of the interfacial layer thicknesses by using a high resolution cross-sectional TEM confirmed the accuracy of the AES depth analysis. The $SiO_2/Si_3N_4$ double layers, which were not distinguishable from each other under the TEM observation, could be effectively analyzed by the AES depth profiling technique.

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