• 한국신재생에너지학회:학술대회논문집
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• 2009.06a
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• pp.180-182
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• 2009

Two different wet etching solutions, NaOH 40% and Acid, were used for etching in tri-crystalline Silicon(Tri-Si) solar cell fabrication. The wafers etched in NaOH40% solution showed higher reflectance compared to the wafers etched in Acid solution after $SiN_x$ deposition. In light current-voltage results, the cells etched in Acid solution exhibited higher short circuit current and open circuit voltage than those of the cells etched in NaOH 40% solution. We have obtained 16.70% conversion efficiency in large area($156cm^2$) Tri-Si solar cells etched in Acid solution.

• Korean Journal of Materials Research
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• v.23 no.6
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• pp.322-328
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• 2013

The relationship the between electrical properties and surface roughness (Ra) of a wet-etched silicon wafer were studied. Ra was measured by an alpha-step process and atomic force microscopy (AFM) while varying the measuring range $10{\times}10$, $40{\times}40$, and $1000{\times}1000{\mu}m$. The resistivity was measured by assessing the surface resistance using a four-point probe method. The relationship between the resistivity and Ra was explained in terms of the surface roughness. The minimum error value between the experimental and theoretical resistivities was 4.23% when the Ra was in a range of $10{\times}10{\mu}m$ according to AFM measurement. The maximum error value was 14.09% when the Ra was in a range of $40{\times}40{\mu}m$ according to AFM measurement. Thus, the resistivity could be estimated when the Ra was in a narrow range.

• Biotechnology and Bioprocess Engineering:BBE
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• v.8 no.4
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• pp.252-256
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• 2003

In this paper we describe the status of a silicon-based microelectrode for neural recording and an advanced neural interface. We have developed a silicon neural probe, using a combination of plasma and wet etching techniques. This process enables the probe thickness to be controlled precisely. To enhance the CMOS compatibility in the fabrication process, we investigated the feasibility of the site material of the doped polycrystalline silicon with small grains of around 50 nm in size. This silicon electrode demonstrated a favorable performance with respect to impedance spectra, surface topography and acute neural recording. These results showed that the silicon neural probe can be used as an advanced microelectrode for neurological applications.

• Journal of IKEEE
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• v.13 no.4
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• pp.23-27
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• 2009

Ohmic contact formation and etching processes for the fabrication of MBE (molecular beam epitaxy) grown GaSb-based p-channel HEMT devices on Si substrate have been studied. Firstly, mesa etching process was established for device isolation, based on both HF-based wet etching and ICP-based dry etching. Ohmic contact process for the source and drain formation was also studied based on Ge/Au/Ni/Au metal stack, which resulted in a contact resistance as low as $0.683\;{\Omega}mm$ with RTA at $320^{\circ}C$ for 60s. Finally, for gate formation of HEMT device, gate recess process was studied based on AZ300 developer and citric acid-based wet etching, in which the latter turned out to have high etching selectivity between GaSb and AlGaSb layers that were used as the cap and the barrier of the device, respectively.

• Proceedings of the Materials Research Society of Korea Conference
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• 2012.05a
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• pp.88.1-88.1
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• 2012

Silicon nanowires (SiNWs), due to their unusual quantum-confinement effects that lead to superior electrical and optical properties compared to those of the bulk silicon, have been widely researched as a potential building block in a variety of novel electronic devices. The conventional means for the synthesis of SiNWs has been the vapor-liquid-solid method using chemical vapor deposition; however, this method is time consuming, environmentally unfriendly, and do not support vertical growth. As an alternate, the electroless etching method has been proposed, which uses metal catalysts contained in aqueous hydrofluoric acids (HF) for vertically etching the bulk silicon substrate. This new method can support large-area growth in a short time, and vertically aligned SiNWs with high aspect ratio can be readily synthesized with excellent reproducibility. Nonetheless, there still are rooms for improvement such as the poor surface characteristics that lead to degradation in electrical performance, and non-uniformity of the diameter and shapes of the synthesized SiNWs. Here, we report a facile method of SiNWs synthesis having uniform sizes, diameters, and shapes, which may be other than just cylindrical shapes using a modified nanosphere lithography technique. The diameters of the polystyrene nanospheres can be adjustable through varying the time of O2 plasma treatment, which serve as a mask template for metal deposition on a silicon substrate. After the removal of the nanospheres, SiNWs having the exact same shape as the mask are synthesized using wet etching technique in a solution of HF, hydrogen peroxide, and deionized water. Different electrical and optical characteristics were obtained according to the shapes and sizes of the SiNWs, which implies that they can serve specific purposes according to their types.

• Journal of Fisheries and Marine Sciences Education
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• v.19 no.3
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• pp.366-372
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• 2007

This paper presents the fabrication techniques of microcooling fins for microelectronics applications. The various types of cooling fins have been fabricated on the surface of a silicon wafer (4inch-N type) by using wet etching technique. The designed micro fins and micro channels are considered as an effective method for cooling microelectronics devices generating high heat flux. Further we extensively investigate the design processes fabricating micro fins and channels which can cool the heat generated from high density electronics devices.

• Proceedings of the KIEE Conference
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• 1996.07c
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• pp.1977-1979
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• 1996

Single-crystaIline silicon diaphgrams and features are fabricated without using an etch stop process. The process involves vertical dry etching, double-sided alignment, followed by wet-chemical etching from the back side. The abvantages of this process are that $5{\sim}50{\mu}m$ diaphgrams and features can be fabricated accurately and inexpensively. In addition, since no impurity-based process is introduced, highly uniform and homogenous properties can be achieved

• 한국신재생에너지학회:학술대회논문집
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• 2005.06a
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• pp.192-195
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• 2005

The silicon thin film solar cells were fabricated by 13.56 MHz PECVD (Plasma-Enhanced Chemical-Vapor Deposition) and 60 MHz VHF PECVD (Very High-Frequency Plasma-Enhanced Chemical-Vapor Deposition). We focus on textured ZnO:Al films prepared by RF sputtering and post deposition wet chemical etching and studied the surface morphology and optical properties. These films were optimized the light scattering properties of the textured ZnO:Al after wet chemical etching. Finally, the textured ZnO:Al films were successfully applied as substrates for silicon thin films solar cells. The efficiency of tandem solar cells with $0.25 cm^2$ area was $11.8\%$ under $100mW/cm^2$ light intensity. The electrical properties of tandem solar cells were measured with solar simulator (AM 1.5, $100 mW/cm^2)$ and spectral response measurements.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.1
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• pp.39-45
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• 2012

Three-dimensional integrated circuit(3D IC) technology has become increasingly important due to the demand for high system performance and functionality. In this work, BOE and HF wet etching of Cu line surfaces after CMP were conducted for Cu-Cu pattern direct bonding. Step height of Cu and $SiO_2$ as well as Cu dishing after Cu CMP were analyzed by the 3D-Profiler. Step height increased and Cu dishing decreased with increasing BOE and HF wet etching times. XPS analysis of Cu surface revealed that Cu surface oxide layer was partially removed by BOE and HF wet etching treatment. BOE treatment showed not only the effective $SiO_2$ etching but also reduced dishing and Cu surface oxide rather than HF treatment, which can be used as an meaningful process data for reliable Cu-Cu pattern bonding characteristics.

• Korean Journal of Materials Research
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• v.23 no.2
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• pp.116-122
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• 2013

For fabricating silicon solar cells with high conversion efficiency, texturing is one of the most effective techniques to increase short circuit current by enhancing light trapping. In this study, four different types of textures, large V-groove, large U-groove, small V-groove, and small U-groove, were prepared by a wet etching process. Silicon substrates with V-grooves were fabricated by an anisotropic etching process using a KOH solution mixed with isopropyl alcohol (IPA), and the size of the V-grooves was controlled by varying the concentration of IPA. The isotropic etching process following anisotropic etching resulted in U-grooves and the isotropic etching time was determined to obtain U-grooves with an opening angle of approximately $60^{\circ}$. The results indicated that U-grooves had a larger diffuse reflectance than V-grooves and the reflectances of small grooves was slightly higher than those of large grooves depending on the size of the grooves. Then amorphous Si:H thin film solar cells were fabricated on textured substrates to investigate the light trapping effect of textures with different shapes and sizes. Among the textures fabricated in this work, the solar cells on the substrate with small U-grooves had the largest short circuit current, 19.20 mA/$cm^2$. External quantum efficiency data also demonstrated that the small, U-shape textures are more effective for light trapping than large, V-shape textures.