• Journal of the Korean Solar Energy Society
• /
• v.38 no.1
• /
• pp.45-55
• /
• 2018

Environmentally benign lead-free solder coated ribbon (e. g. SnCu, SnZn, SnBi${\cdots}$) has been intensively studied to interconnect cells without lead mixed ribbon (e. g. SnPb) in the crystalline silicon(c-Si) photovoltaic modules. However, high melting point (> $200^{\circ}C$) of non-lead based solder provokes increased thermo-mechanical stress during its soldering process, which causes early degradation of PV module with it. Hence, we proposed low-temperature conductive paste (CP) based tabbing method for lead-free ribbon. Modules, interconnected by the lead-free solder (SnCu) employing CP approach, exhibits similar output without increased resistivity losses at initial condition, in comparison with traditional high temperature soldering method. Moreover, 400 cycles (2,000 hour) of thermal cycle test reveals that the module integrated by CP approach withstands thermo-mechanical stress. Furthermore, this approach guarantees strong mechanical adhesion (peel strength of ~ 2 N) between cell and lead-free ribbons. Therefore, the CP based tabbing process for lead free ribbons enables to interconnect cells in c-Si PV module, without deteriorating its performance.

• Journal of the Korean institute of surface engineering
• /
• v.40 no.4
• /
• pp.190-196
• /
• 2007

Dye sensitized solar cells(DSSC) are the most promising future energy resource due to their high energy efficiency, low production cost, and simple manufacturing process. But one problem in DSSC is short life time compared to silicon solar cells. This problem occurred from photocatalytic degradation of dye material by nanometer sized $TiO_2$ particles. To prevent dye degradation as well as to increase its life time, the transparent coating film is needed for UV blocking. In this study, we synthesized nanometer sized $TiO_2$ particles in sols by increasing its internal pressure up to 200 bar in autoclave at $120^{\circ}C$ for 10 hrs. The synthesized $TiO_2$ sols were all formed with brookite phase and their particle size was several nm to 30 nm. Synthesized $TiO_2$ sols were coated on the backside of fluorine doped tin oxide(FTO) glass by ink jet printing method. With increasing coating thickness by repeated ink jet coating, the absorbance of UV region (under 400 nm) also increases reasonably. Decomposition test of titania powders dispersed in 0.1 mM amaranth solution covered with $TiO_2$ coating glass shows more stable dye properties under UV irradiation, compared to that with as-received FTO glass.

• Current Photovoltaic Research
• /
• v.9 no.4
• /
• pp.128-132
• /
• 2021

Advances in screen printing technology have been led to development of high efficiency silicon solar cells. As a post PERx structure, an n-type wafer-based rear side TOPCon structure has been actively researched for further open-circuit voltage (Voc) improvement. In the case of the metal contact of the TOPCon structure, the poly-Si thickness is very important because the passivation of the substrate will be degraded when the metal paste penetrates until substrate. However, the thin poly-Si layer has advantages in terms of current density due to reduction of parasitic absorption. Therefore, poly-Si thickness and firing temperature must be considered to optimize the metal contact of the TOPCon structure. In this paper, we varied poly-Si thickness and firing peak temperature to evaluate metal induced recombination (Jom) and contact resistivity. Jom was evaluated by using PL imaging technique which does not require both side metal contact. As a results, we realized that the SiN_x deposition conditions can affect the metal contact of the TOPCon structure.

• Korean Journal of Materials Research
• /
• v.22 no.4
• /
• pp.190-194
• /
• 2012

The formation of high-quality polycrystalline silicon (poly-Si) on relatively low cost substrate has been an important issue in the development of thin film solar cells. Poly-Si seed layers were fabricated by an inverse aluminum-induced crystallization (I-AIC) process and the properties of the resulting layer were characterized. The I-AIC process has an advantage of being able to continue the epitaxial growth without an Al layer removing process. An amorphous Si precursor layer was deposited on Corning glass substrates by RF magnetron sputtering system with Ar plasma. Then, Al thin film was deposited by thermal evaporation. An $SiO_2$ diffusion barrier layer was formed between Si and Al layers to control the surface orientation of seed layer. The crystallinity of the poly-Si seed layer was analyzed by Raman spectroscopy and x-ray diffraction (XRD). The grain size and orientation of the poly-Si seed layer were determined by electron back scattering diffraction (EBSD) method. The prepared poly-Si seed layer showed high volume fraction of crystalline Si and <100> orientation. The diffusion barrier layer and processing temperature significantly affected the grain size and orientation of the poly Si seed layer. The shorter oxidation time and lower processing temperature led to a better orientation of the poly-Si seed layer. This study presents the formation mechanism of a poly seed layer by inverse aluminum-induced crystallization.

• Korean Journal of Materials Research
• /
• v.27 no.10
• /
• pp.518-523
• /
• 2017

In commercial solar cells, the pattern of the front electrode is critical to effectively assemble the photo generated current. The power loss in solar cells caused by the front electrode was categorized as four types. First, losses due to the metallic resistance of the electrode. Second, losses due to the contact resistance of the electrode and emitter. Third, losses due to the emitter resistance when current flows through the emitter. Fourth, losses due to the shading effect of the front metal electrode, which has a high reflectance. In this paper, optimizing the number of finger on a $4{\times}4$ solar cell is demonstrated with known theory. We compared the short circuit current density and fill factor to evaluate the power loss from the front metal contact calculation result. By experiment, the short circuit current density($J_{sc}$), taken in each pattern as 37.61, 37.53, and $37.38mA/cm^2$ decreased as the number of fingers increased. The fill factor(FF), measured in each pattern as 0.7745, 0.7782 and 0.7843 increased as number of fingers increased. The results suggested that the efficiency(Eff) was measured in each pattern as 17.51, 17.81, and 17.84 %. Throughout this study, the short-circuit current densities($J_{sc}$) and fill factor(FF) varied according to the number of fingers in the front metal pattern. The effects on the efficiency of the two factors were also investigated.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2014.02a
• /
• pp.454-454
• /
• 2014

Silicon microwire array is one of the promising platforms as a means for developing highly efficient solar cells thanks to the enhanced light trapping efficiency. Among the various fabrication methods of microstructures, deep reactive ion etching (DRIE) process has been extensively used in fabrication of high aspect ratio microwire arrays. In this presentation, we show precisely controlled Si microwire arrays by tuning the DRIE process conditions. A periodic microdisk arrays were patterned on 4-inch Si wafer (p-type, $1{\sim}10{\Omega}cm$) using photolithography. After developing the pattern, 150-nm-thick Al was deposited and lifted-off to leave Al microdisk arrays on the starting Si wafer. Periodic Al microdisk arrays (diameter of $2{\mu}m$ and periodic distance of $2{\mu}m$) were used as an etch mask. A DRIE process (Tegal 200) is used for anisotropic deep silicon etching at room temperature. During the process, $SF_6$ and $C_4F_8$ gases were used for the etching and surface passivation, respectively. The length and shape of microwire arrays were controlled by etching time and $SF_6/C_4F_8$ ratio. By adjusting $SF_6/C_4F_8$ gas ratio, the shape of Si microwire can be controlled, resulting in the formation of tapered or vertical microwires. After DRIE process, the residual polymer and etching damage on the surface of the microwires were removed using piranha solution ($H_2SO_4:H_2O_2=4:1$) followed by thermal oxidation ($900^{\circ}C$, 40 min). The oxide layer formed through the thermal oxidation was etched by diluted hydrofluoric acid (1 wt% HF). The surface morphology of a Si microwire arrays was characterized by field-emission scanning electron microscopy (FE-SEM, Hitachi S-4800). Optical reflection measurements were performed over 300~1100 nm wavelengths using a UV-Vis/NIR spectrophotometer (Cary 5000, Agilent) in which a 60 mm integrating sphere (Labsphere) is equipped to account for total light (diffuse and specular) reflected from the samples. The total reflection by the microwire arrays sample was reduced from 20 % to 10 % of the incident light over the visible region when the length of the microwire was increased from $10{\mu}m$ to $30{\mu}m$.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.26 no.6
• /
• pp.30-37
• /
• 1989

The PIN type a-SiC:H/a-Si:H heterojunction solar cells were fabricated by using the rf glow discharge decomposition of $SiH_4$ mixed with $CH_4,B_2,H_6\;and\;PH_3.$ The efficiency of the solar cell of the $SnO_2/ITO$ was higher than that of ITO transparent oxide layer by 1.5%. The P layer was prepared with the thickness of $100{\AA}$ and $CH_4/SiH_4$ ration of 5. The I layer has been deposited on the P layer and it is not pure intrinsic but near N type. So $SiH_4$ mixed with $B_2H_6$ of 0.3ppm was used to change this N type nature to intrinsic having the thickness of 5000${\AA}$. And consecutively, the N layer was deposited with t ethickness of $400{\AA}$ using $SiH_4/PH_3$ mixtures. The solar cell demonstrated 0.94V of $V_{oc'}$ 14.6mA/cm of $J_{sc}$ and 58.2% of FF, resulting the efficiency of 8.0%. To minimize loss by the reflection of light, $MgF_2$ layer was coated on the lgass and the efficiency was improved by 0.5%. Therefore, the solar cell indicated overall efficiency of 8.5%.

• Journal of the Korean Vacuum Society
• /
• v.22 no.1
• /
• pp.13-19
• /
• 2013

It is expected that progress in building-integrated photovoltaic (BIPV) systems, improving the functionality and design of buildings, will be accelerated in the coming years. While the dye sensitized solar cell is considered one of the most important technologies in the BIPV field, the transparent silicon based thin film solar cell fabricated by thin film processes has drawn attention as a novel alternative. When the selective transmitting layer is applied to the solar cell, the conversion efficiency is improved due to the re-reflection of infrared light into an absorber layer with the transmission of visible light through the solar cell. In this work, we prepared Al-Ti based oxide thin films using cost-effective sputter deposition and examined their selective transmitting characteristics with various compositions. The transmittance and reflectance of the Al-Ti based oxide thin film changed with the variation of its composition, and the selective transmitting property was observed in the sample with the 25 nm-thick AlTiO layer. It is considered that the realization of transparent solar cells and the improvement of their conversion efficiency can be achieved by introducing the Al-Ti based selective transmitting layer.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2015.08a
• /
• pp.189-189
• /
• 2015

Plasmonics, sensor, field effect transistors, solar cells 등 다양한 적용분야를 가지는 실리콘 구조체는 제작공정에 의해 전기적 및 광학적 특성이 달라지기 때문에 적합한 나노구조 제작방법이 요구되고 있다. 나노구조체 제작방법으로는 Photo lithography, Extreme ultraviolet lithography (EUV), Nano imprinting lithography (NIL), Block copolymer (BCP) 방식의 방법들이 연구되고 있으며, 특히 BCP는 direct self-assembly 특성을 가지고 있으며 가격적인 면에서도 큰 장점을 가진다. 하지만 BCP를 mask로 사용하여 식각공정을 진행할 경우 BCP가 버티지 못하고 변형되어 mask로서의 역할을 하지 못한다. 이러한 문제를 해결하기 위하여 본 논문에서는 BCP와 질화막을 이용한 double mask 방법을 사용하였다. 기판 위에 BCP를 self-assembly 시키고 mask로 사용하여 hole 부분으로 노출된 기판을 Ion gun을 통해 질화 시킨 후에 BCP를 제거한다. 기판 위에 hole 모양의 질화막 표면은 BCP와 다르게 etching 공정 중 변형되지 않는다. 이러한 질화막 표면을 mask로 사용하여 pillar pattern의 실리콘 나노구조체를 제작하였다. 질화막 mask로 사용되는 template은 PS와 PMMA로 구성된 BCP를 사용하였다. 140kg/mol의 polystyrene과 65kg/mol의 PMMA를 톨루엔으로 용해시키고 실리콘 표면 위에 spin coating으로 도포하였다. Spin coat 후 230도에서 40시간 동안 열처리를 진행하여 40nm의 직경을 가진 PS-b-PMMA self-assembled hole morphology를 형성하였다. 질화막 형성 및 etching을 위한 장비로 low-energy Ion beam system을 사용하였다. Reactive Ion beam은 ICP와 3-grid system으로 구성된 Ion gun으로부터 형성된다. Ion gun에 13.56 MHz의 frequency를 갖는 200W 전력을 인가하였다. Plasma로부터 나오는 Ion은 $2{\Phi}$의 직경의 hole을 가지는 3-grid hole로 추출된다. 10~70 voltage 범위의 전위를 plasma source 바로 아래의 1st gird에 인가하고, 플럭스 조절을 위해 -150V의 전위를 2nd grid에 인가한다. 그리고 3rd grid는 접지를 시켰다. chamber내의 질화 및 식각가스 공급은 2mTorr로 유지시켰다. 그리고 기판의 온도는 냉각칠러를 이용하여 -20도로 냉각을 진행하였다. 이와 같은 공정 결과로 100 nm 이상의 높이를 갖는 40 nm직경의 균일한 Silicon pillar pattern을 형성 할 수 있었다.

• 한국신재생에너지학회:학술대회논문집
• /
• 2011.05a
• /
• pp.110.2-110.2
• /
• 2011

일본 Sanyo 사에 의해서 획기적으로 HIT 태양전지가 개발된 바 있다. 이러한 HIT 태양전지는 기존의 확산-접합 Si 태양전지에 비해서 저비용 고효율의 장점을 갖는다: 22% 이상의 변환효율, $200^{\circ}C$ 이하의 공정온도, 낮은 태양전지 온도 의존도, 높은 개방전압. 한편 Sanyo사의 HIT 태양전지는 n-형 Si 웨이퍼를 이용한 반면에, 최근 미국 National Renewable Energy Laboratory는 p-형 Si 웨이퍼를 이용해서 변환효율 19% 대의 HIT 태양전지를 개발한 바 있다. 그 동안 지속적으로 p-형 Si HIT 태양전지를 고효율화하기(< 22%) 위해서 많은 노력이 진행되어 왔지만 이와 같은 노력에도 불구하고 아직 p-형 HIT는 n-형 HIT 태양전지에 비해서 다소 성능면에서 떨어져 있다. 본 연구는 n- 및 p-형 실리콘 웨이퍼로 구성된 HIT 태양전지의 물리적인 차이점에 초점을 맞추고, 결정 및 비정질 실리콘 층의 역할에 대해서 연구하였다. 특히 태양전지 효율을 향상시키는 요소들로서 결정 실리콘의 불순물 준위(n- 및 p-형) 또는 비저항, 비정질 실리콘으로 구성된 emitter 층, intrinsic 층, 경계면이 고려되었다. 그리고 이러한 요소들이 HIT 태양전지에 미치는 영향을 조사하기 위해서 AMPS-1D 컴퓨터 프로그램을 사용하였고, 이를 통해서 HIT 태양전지의 결정 및 비정질 실리콘 층의 역할을 물리적 정량적으로 분석하였다. 본 연구에 적용되는 HIT는 ITO/a-Si:H(p+)/a-Si:H(i)/c-Si(n)/a-Si:H(i)/a-Si:H(n+) 및 ITO/a-Si:H(n+)/a-Si:H(i)/c-Si(p)/a-Si:H(i)/a-Si:H(p+)의 구조로서 다음과 같은 태양전지 특성을 갖는다: n-형 HIT의 경우, fill factor ~ 0.78, 단락전류밀도 ~ 38.1 $mA/cm^2$, 개방전압 0.74 V, 변환효율 22.3 % (그리고 p-형 HIT의 경우, fill factor ~ 0.76, 단락전류밀도 ~ 36.5 $mA/cm^2$, 개방전압 0.69 V, 변환효율 19.4 %).