• Title/Summary/Keyword: Signal generator

Search Result 789, Processing Time 0.03 seconds

Performance Comparison of Anti-Spoofing Methods using Pseudorange Measurements (의사거리 측정치를 이용하는 기만신호 검출 기법의 성능 비교)

  • Cho, Sung-Lyong;Shin, Mi-Young;Lee, Sang-Jeong;Park, Chan-Sik
    • Journal of the Korea Institute of Military Science and Technology
    • /
    • v.13 no.5
    • /
    • pp.793-800
    • /
    • 2010
  • GPS spoofing is an intentional interference which uses the mimic GPS signals to fake the receivers. The generic GPS receiver is hard to recognize the spoofing signal because the spoofer generates the fake signals as close as possible to the GPS signal. So the spoofer can do critical damage to public operations. This paper introduces a basic concept of spoofing and analyzes the effect of the spoofing signal to the GPS receiver. Also for stand-alone GPS receivers, two anti-spoofing methods are implemented : RAIM based method and the SQM based method. To evaluate the performance of anti-spoofing method, the software based spoofing signal generator and GPS signal generator are implemented. The performance of the anti-spoofing methods obtained using the output of the software based GPS receiver shows that SQM based method is more effective when multiple spoofing signals exist.

Design of Low-power Clock Generator Synchronized with the AC Power Source Using the ADCL Buffer for Adiabatic Logics (ADCL 버퍼를 이용한 단열 논리회로용 AC 전원과 동기화된 저전력 클럭 발생기 설계)

  • Cho, Seung-Il;Kim, Seong-Kweon;Harada, Tomochika;Yokoyama, Michio
    • The Journal of the Korea institute of electronic communication sciences
    • /
    • v.7 no.6
    • /
    • pp.1301-1308
    • /
    • 2012
  • In this paper, the low-power clock generator synchronized with the AC power signal using the adiabatic dynamic CMOS logic (ADCL) buffer is proposed for adiabatic logics. To reduce the power dissipation in conventional CMOS logic and to maintain adiabatic charging and discharging with low power for the ADCL, the clock signal of logic circuits should be synchronized with the AC power source. The clock signal for an adiabatic charging and discharging with the AC power signal was generated with the designed Schmitt trigger circuit and ADCL frequency divider using the ADCL buffer. From the simulation result, the power consumption of the proposed clock generator was estimated with approximately 1.181uW and 37.42uW at output 3kHz and 10MHz respectively.

Central Server Management System of AMOLED Aging Chamber Signal Generator (AMOLED 에이징 챔버 신호 생성기 중앙서버 관리 시스템)

  • Kim, Hankil;Lee, Byungkwon;Jung, Heokyung
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.21 no.6
    • /
    • pp.1161-1166
    • /
    • 2017
  • Recently, with the development of display technology, AMOLED(Active Matrix OLED) panel production and demand are increasing. Unlike LCD, AMOLED panel basically does not need backlight, so it can output clear images with low power consumption. Therefore, the AMOLED market is growing globally. Accordingly, the demand for inspection devices required for production is also expanding. The inspection device of the AMOLED panel aging system operates in conjunction with MES(Manufacturing Execution System) and MIS(Management Information System), and it is efficient to construct network environment. The inspection device used for panel aging is a pattern generator capable of outputting multiple signals. Efficient design is required to operate multiple signal generators. To solve this problem, the proposed system proposed a method for remotely controlling the signal generator remotely and a method for driving the AMOLED panel. And the timing and power setting results are presented.

Wireless Triggering Pulse Generation for Digital X-ray Imaging System (디지털 x-ray 영상시스템을 위한 무선 트리거 발생기)

  • Ko, Dae-Sik;Lee, Jae-Cheol;Lee, Joo-Shin
    • Journal of Advanced Navigation Technology
    • /
    • v.11 no.2
    • /
    • pp.163-169
    • /
    • 2007
  • In this paper, we propose a method of trigger pulse generation to capture the image on time by making a synchronization between the x-ray generator and digital x-ray image acquisition system. we designed a wireless trigger pulse generation circuit to make a synchronization between x-ray generator and digital image acquisition system and analysis its performance. When it starts to detect a certain level of x-ray radiation or above from the air, this method starts to generate a ACQ_START signal to indicate the timing for image acquisition starting from digital image acquisition system. Hence, when it starts to detect under certain level of x-ray signal from the air, this method starts to generate a ACC_END signal to indicate the timing for image acquisition stop from digital image acquisition system. Image acquisition is activated only this time between ACQ_START and ACQ_END signal. By doing this wireless detecting of x-ray signal from remote, we can get more accurate timing for capturing the x-ray image and any type of x-ray generator can be connected to digital image acquisition system, regards of wired protocol. This makes easy installation. We could get 3.5 line pair / mm resolution at 20 mAs of x-ray level with resolution chart. This is same or better image comparing to conventional wired result.

  • PDF

Research for Signal Analysis of 18Mn-5Cr Steel Generator Retaining Ring using Ultrasonic Wave (초음파를 이용한 18Mn-5Cr강 발전기 리테이닝 링의 신호분석에 관한 연구)

  • Gil, D.S.;Ahn, Y.S.;Park, S.K.
    • Journal of Power System Engineering
    • /
    • v.14 no.2
    • /
    • pp.65-70
    • /
    • 2010
  • Retaining rings are used to support the field winding end turns from the centrifugal force by the high speed of the field and these are the overstressed parts among the generator parts. There have been several retaining failures in Europe and America, all attributable to stress corrosion cracking in 18Mn-5Cr steel. Since then, each manufacture companies have developed a good 18Mn-5Cr steel in temperature, strength characteristic and it is used in many field now. From many findings and test results, we could conformed that the failure might be grown in the overstressed condition unrelated to the moisture particle.

A Fault Detection System Design for Uncertain Fuzzy Systems

  • Yoo, Seog-Hwan;Choi, Byung-Jae
    • International Journal of Fuzzy Logic and Intelligent Systems
    • /
    • v.6 no.1
    • /
    • pp.1-5
    • /
    • 2006
  • This paper deals with a fault detection system design for uncertain nonlinear systems modelled as T-S fuzzy systems with the integral quadratic constraints. In order to generate a residual signal, we used a left coprime factorization of the T-S fuzzy system. From the filtered signal of the residual generator, the fault occurence can be detected effectively. A simulation study with nuclear steam generator level control system shows that the suggested method can be applied to detect the fault in actual applications.

FPGA circuit implementation of despreading delay lack loop for GPS receiver and preformance analysis (GPS 수신기용 역확산 지연 동기 루프의 FPGA 회로 구현과 성능 분석)

  • 강성길;류흥균
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.22 no.3
    • /
    • pp.506-514
    • /
    • 1997
  • In this paper, we implement digital circuit of despreading delay lock loop for GPS receiver. The designed system consists of Epoch signal generator, two 13bit correlators which correlates the received C/A code and the locally generated C/A code in the receiver, the C/A code generator which generates C/A code of selected satellite, and the direct digital clock synthesizer which generates the clock of the C/A code generator to control the phase and clock rate, the clock controller, and the clock divider. The designed circuit has the function of the acquisition and tracking by the autocorrelation characteristics of Gold code. The controller generates each other control signals according to the correlation value. The designed circuit is simulated to verify the logic functional performance. By using the simulator STR-2770 that generates the virtual GPS signal, the deigned FPGA chip is verified the circuit performance.

  • PDF

A New Orthogonal Signal Generator with DC Offset Rejection for Single-Phase Phase Locked Loops

  • Huang, Xiaojiang;Dong, Lei;Xiao, Furong;Liao, Xiaozhong
    • Journal of Power Electronics
    • /
    • v.16 no.1
    • /
    • pp.310-318
    • /
    • 2016
  • This paper presents a new orthogonal signals generator (OSG) with DC Offset rejection for implementing a phase locked loop (PLL) in single-phase grid-connected power systems. An adaptive filter (AF) based on the least mean square (LMS) algorithm is used to constitute the OSG in this study. The DC offset in the measured grid voltage signal can be significantly rejected in the developed OSG technique. This generates two pure orthogonal signals that are free from the DC offset. As a result, the DC offset rejection performance of the presented single-phase phase locked loop (SPLL) can be enhanced. A mathematical model of the developed OSG and the principle of the adaptive filter based SPLL (AF-SPLL) are presented in detail. Finally, simulation and experimental results demonstrate the feasibility of the proposed AF-SPLL.

Comparison Between Simulation and Test Result of Sigma-Delta STAP (Sigma-Delta STAP의 시뮬레이션과 시험 결과 비교)

  • Kwon, Bojun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.29 no.6
    • /
    • pp.457-463
    • /
    • 2018
  • This paper compares the results of ${\Sigma}{\Delta}-STAP$ applied to actual radar test data and simulation data. The radar received a target signal from a virtual target generator and the clutter signal from a signal generator in an anechoic chamber. The simulation data were generated from ideal baseband radar signal modeling using the same parameter as that for the test radar. The ${\Sigma}{\Delta}-STAP$ results of the test and simulation data are similar in terms of the target signal shape and noise level. The SINR(Signal-to-Interfrence-plus-Noise Ratio) loss also had similar aspects, but the simulation result shows 1~2 dB higher SINR loss than the test result. This result verified that the simulation data can be a reasonable alternative test data when the ${\Sigma}{\Delta}-STAP$ is applied.

Realization of Multi-purpose Coherent Monopulse Radar Simulator with Expandable Feature (확장성을 갖는 다목적 코히어런트 모노펄스 레이더 시뮬레이터 구현)

  • Kim, Jae-Jun;Lee, Jong-Pil;Rhee, Ill-Keun
    • Journal of IKEEE
    • /
    • v.8 no.1 s.14
    • /
    • pp.39-46
    • /
    • 2004
  • This paper presents the realization schemes for a multipurpose coherent mono-pulse radar Simulator with extendable features. We developed and installed the TSG(Timing Signal Generator) board which can simulate a mechanically rotate signal of antenna, an operation timing signal of pulse radar and target signal, to operate the simulator without real target in the indoor environment. Also, with the insertion of the radar signal processor, it came to be easy to achieve the addition of radar function algorithms, to rebuild or extend the multi-DSP Architecture into the simulator. Throughout the simulation results, we verified that the designed coherent mono-pulse radar simulator can exactly display a moving target on the realistic monitor(RD 9800).

  • PDF