• Korean Journal of Remote Sensing
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• v.28 no.2
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• pp.181-189
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• 2012

Recently, interest in potential for estimating water quality using high resolution satellite images is increasing. However, low SNR(Signal to Noise Ratio) over inland water and radiometric errors such as non-linearity of brightness value of high resolution satellite images often lead to accuracy degradation in water quality estimation. Therefore radiometric correction should be carried out to estimate water quality for high resolution satellite images. For KOMPSAT-2 images parameters for brightness value-radiance conversion are not available and precise radiometric correction is difficult. To exploit KOMPSAT-2 images for water quality monitoring, it is necessary to investigate non-linearity of brightness value and noise over inland water. In this paper, we performed brightness value comparison between KOMPSAT-2 images and IKONOS/GeoEye-1, which are known to show the linearity. We used the images obtained over the same area and on the same date for comparison. As a result, we showed that although KOMPSAT-2 images are more noisy;the trend of brightness value and pattern of noise are almost similar to reference images. The results showed that appropriate target area to minimize the impact of noise was $5{\times}5$. Non-linearity of brightness value between KOMPSAT-2 and reference images was not observed. Therefore we could conclude that KOMPSAT-2 may be used for estimation of water quality parameters such as concentration of chlorophyll.

• Journal of Advanced Navigation Technology
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• v.25 no.1
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• pp.68-77
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• 2021

In this paper, a GPS/MEMS IMU integrated navigation receiver module capable of operating in a high dynamic environment is designed and fabricated, and the results is confirmed. The designed module is composed of RF receiver unit, inertial measurement unit, signal processing unit, correlator, and navigation S/W. The RF receiver performs the functions of low noise amplification, frequency conversion, filtering, and automatic gain control. The inertial measurement unit collects measurement data from a MEMS class IMU applied with a 3-axis gyroscope, accelerometer, and geomagnetic sensor. In addition, it provides an interface to transmit to the navigation S/W. The signal processing unit and the correlator is implemented with FPGA logic to perform filtering and corrrelation value calculation. Navigation S/W is implemented using the internal CPU of the FPGA. The size of the manufactured module is 95.0×85.0×.12.5mm, the weight is 110g, and the navigation accuracy performance within the specification is confirmed in an environment of 1200m/s and acceleration of 10g.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.50 no.11
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• pp.801-807
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• 2022

In this paper, we propose an ultra compact S-Band PCM/FM telemetry transmitter. The equipment is compact, so it can be applied to a limited space and capable of stable data transmission was designed and manufactured even with specifications set differently for each operating environment and system. RF direct conversion structure is used for the miniaturization of equipment, an RF transmission board, Power distribution board, and a signal processing board were implemented on a single PCB, so that the function of the transmitter could be performed with a minimum device. According to the target specification, variable output of 1~10W and variable data rate of 390kbps~12.5Mbps is possible in S-Band(2,200~2,400MHz) without degradation of performance. To verify the performance of the equipment, the RF performance test and BER measurement test were performed after the equipment was manufactured. It was confirmed that the OBW, null-to-null bandwidth, 1st IMD, Spurious emission, Phase noise specification of the PCM/FM modulated signal which is presented by the IRIG standard were satisfied, and we can confirm the data received using the transmitter inspection equipment were transmitted normally without distortion.

• Journal of the Institute of Convergence Signal Processing
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• v.24 no.4
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• pp.205-212
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• 2023

Among cardiac diseases, arrhythmias can lead to serious complications such as stroke, heart attack, and heart failure if left untreated, so continuous and accurate ECG monitoring is crucial for clinical care. However, the accurate interpretation of electrocardiogram (ECG) data is entirely dependent on medical doctors, which requires additional time and cost. Therefore, this paper proposes an arrhythmia recognition module for the purpose of developing a medical platform through the analysis of abnormal pulse waveforms based on Lifelogs. The proposed method is to convert ECG data into image format instead of time series data, apply visual pattern recognition technology, and then detect arrhythmia using CNN model. In order to validate the arrhythmia classification of the CNN model by image type conversion of ECG data proposed in this paper, the MIT-BIH arrhythmia dataset was used, and the result showed an accuracy of 97%.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.12
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• pp.1983-1993
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• 1993

A power-reduction technique for full-flash A/D converters is proposed. As the resolution of a full-flash A/D converter increases linearly, the number of comparators increases exponentially. The power dissipation is generally larger than other A/D converter architectures because there are many comparators, and they are operating continuously. In this proposed architecture, only a selected number of conmarators are made to operate instead of activating all the comparators of the full-flash A/D convertor. To determine whichcomparators should be activated, voltage levelfider circuits are used. A new clock driver is developed to suppress the dynamic glitch noise which is fed back into the input stage of the comparator. By using this clock driver, the glitch noise in the current source is reduced to one fourth of that when the typical clock signal is applied. The proposed architecture has been implemented with 1.2 m 5GHz BiCMOS technology. The maximum conversion speed is 350Msamples/s. and dissipates only 900mW.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.11B no.3
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• pp.112-118
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• 2001

In the near future, the voltage of power system for passenger vehicle will be changed to 42V from existing 14V./ Because of increasing power and voltage ratings used in the vehicle the motor drive system has high switching dv/dt and it generates electromagnetic interference (EMI) To solve these problems multi-level inverter system may be used The feature of multi-level inverter is the output voltage to be synthesized from several levels of voltage Because of this feature high switching dv/dt and EMI can be reduced in the multi-level inverter system But as the number of level is increased manufacturing cost is getting expensive and system size is getting large. Because of these disadvantages the application of multi-level inverter has been restricted only to high power drives. The method to reduce manufacturing cost and system size is to integrate circuit of multi-level inverter into a few chips But isolated power supply and signal isolation circuit using transformer or opto-coupler for drive circuit are obstacles to implement the integrated circuit (IC) In this paper a drive circuit of 4-level inverter suitable for integration to hybrid or one chip is proposed In the proposed drive circuit DC link voltage is used directly as the power source of each gate drive circuit NPN transistors and PNP transistors are used to isolate to transfer the control signals. So the proposed drive circuit needs no transformers and opto-couplers for electrical isolation of drive circuit and is constructed only using components to be implemented on a silicon wafer With th e proposed drive circuit 4- level inverter system will be possible to be implemented through integrated circuit technology Using the proposed drive circuit 4- level inverter system is constructed and the validity and characteristics of the proposed drive circuit are proved through the experiments.

• Journal of Power Electronics
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• v.5 no.2
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• pp.129-141
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• 2005

A high-performance robust hybrid speed controller for a permanent-magnet synchronous motor (PMSM) drive with an on-line trained neural-network model-following controller (NNMFC) is proposed. The robust hybrid controller is a two-degrees-of-freedom (2DOF) integral plus proportional & rate feedback (I-PD) with neural-network model-following (NNMF) speed controller (2DOF I-PD NNMFC). The robust controller combines the merits of the 2DOF I-PD controller and the NNMF controller to regulate the speed of a PMSM drive. First, a systematic mathematical procedure is derived to calculate the parameters of the synchronous d-q axes PI current controllers and the 2DOF I-PD speed controller according to the required specifications for the PMSM drive system. Then, the resulting closed loop transfer function of the PMSM drive system including the current control loop is used as the reference model. In addition to the 200F I-PD controller, a neural-network model-following controller whose weights are trained on-line is designed to realize high dynamic performance in disturbance rejection and tracking characteristics. According to the model-following error between the outputs of the reference model and the PMSM drive system, the NNMFC generates an adaptive control signal which is added to the 2DOF I-PD speed controller output to attain robust model-following characteristics under different operating conditions regardless of parameter variations and load disturbances. A computer simulation is developed to demonstrate the effectiveness of the proposed 200F I-PD NNMF controller. The results confirm that the proposed 2DOF I-PO NNMF speed controller produces rapid, robust performance and accurate response to the reference model regardless of load disturbances or PMSM parameter variations.

• Journal of Korean Society of Coastal and Ocean Engineers
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• v.3 no.4
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• pp.255-260
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• 1991

A voltage measuring system specified for the voltage fluctuation of the Pusan-Hamada submarine cable is developed by adding circuits of differential amplification and analog-to-digital conversion to a microprocessor-based data logger with a data modem. This system is charaterized by its small size. no power failure. fully unmanned operation. and precise instrumental drift correction. In addition to the cable voltage and current it measures an ambient temperature and a mercury cell voltage in order to calibrate temperature effect and check its long-term stability. The data acquired by this system show that the voltage signal. comprising fast random noises with a constant width of about 0.2V. fluctuates within a range of about 1V and the fluctuation frequency is similar to that of tidal motion. The source voltage of power feeding equipment (PFE) for the cable system seems to be affected when the room temperature changes rapidly.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.3
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• pp.377-383
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• 2012

In this paper, a new design of a planar rectenna system and its application to a wake-up receiver operating for incoming signal with a specified frequency are proposed for low-power sensor system applications. The planar and integrable rectenna system is designed with DGSs(Defected Ground Structures) at 2.4 GHz. The DGSs reject harmonic components of 4.8 and 7.2 GHz and eliminate 2.4 GHz fundamental frequency for DC-path filtering. The rectenna system has been evaluated for the conversion output voltages, and applied to the switching of a power supply at the low-power sensor receivers. The proposed system has been evaluated for the wake-up performance by testing a lownoise amplifier operation. From the experimental results, the proposed receiver system presents excellent operation performances.

• ETRI Journal
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• v.42 no.4
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• pp.549-561
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• 2020

We developed a 0.1-㎛ metamorphic high electron mobility transistor and fabricated a W-band monolithic microwave integrated circuit chipset with our in-house technology to verify the performance and usability of the developed technology. The DC characteristics were a drain current density of 747 mA/mm and a maximum transconductance of 1.354 S/mm; the RF characteristics were a cutoff frequency of 210 GHz and a maximum oscillation frequency of 252 GHz. A frequency multiplier was developed to increase the frequency of the input signal. The fabricated multiplier showed high output values (more than 0 dBm) in the 94 GHz-108 GHz band and achieved excellent spurious suppression. A low-noise amplifier (LNA) with a four-stage single-ended architecture using a common-source stage was also developed. This LNA achieved a gain of 20 dB in a band between 83 GHz and 110 GHz and a noise figure lower than 3.8 dB with a frequency of 94 GHz. A W-band image-rejection mixer (IRM) with an external off-chip coupler was also designed. The IRM provided a conversion gain of 13 dB-17 dB for RF frequencies of 80 GHz-110 GHz and image-rejection ratios of 17 dB-19 dB for RF frequencies of 93 GHz-100 GHz.