• Transactions on Electrical and Electronic Materials
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• v.10 no.2
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• pp.58-61
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• 2009

The electrical stability of ZnO: Al thin films deposited on glass substrate by the RF magnetron sputtering method have been modified by a hydrogen annealing treatment and $SiO_2$ protection layer. AZO thin films were deposited at room temperature and different RF powers of 50, 100, 150, and 200 W to optimize the AZO film growth condition. The lowest value of resistivity of $9.44{\times}10^{-4}{\Omega}cm$ was obtained at 2 mtorr, room temperature, and a power level of 150 W. Then, the AZO thin films were annealed at $250-400^{\circ}C$ for 1 h in hydrogen ambient. The minimum resistivity obtained was $8.32{\times}10^{-4}{\Omega}cm$ as-annealed at $300^{\circ}C$. The electrical properties were enhanced by the hydrogen annealing treatment. After a 72 h damp-heat treatment in harsh conditions of a water steam at $110^{\circ}C$ for four representative samples, a degradation of electrical properties was observed. The sample of hydrogen-annealed AZO thin films with $SiO_2$ protection layer showed a slight degradation ratio(17%) of electrical properties and a preferable transmittance of 90%. The electrical stability of AZO thin films had been modified by hydrogen annealing treatment and $SiO_2$ protection layer.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.2
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• pp.187-191
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• 2005

A ZnGa$_2$O$_4$ phosphor target was synthesized through solid-state reactions at a calcine temperature of 700 $^{\circ}C$ and sintering temperature of 1300 $^{\circ}C$ in order to deposit ZnGa$_2$O$_4$ phosphor thin film at various temperature using rf magnetron sputtering system. A ZnGa$_2$O$_4$ phosphor thin film was deposited on Si(100) substrate and annealed by a rapid thermal processor(RTP) at 700 $^{\circ}C$, for 15 sec. The x-ray diffraction patterns of ZnGa$_2$O$_4$ phosphor target and thin film showed the main peak (311) direction. ZnGa$_2$O$_4$ thin film has better crystalization due to as function of increasing substrate and annealing temperature. The cathodoluminescence(CL) spectrums of ZnGa$_2$O$_4$ phosphor thin film showed the main peak 420 nm wavelength and the maximum intensity at the substrate temperature of 500 $^{\circ}C$ and annealing temperature of 700 $^{\circ}C$, for 15 sec.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.135-136
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• 2009

The etching characteristics of Zinc Oxide (ZnO) and etch selectivity of ZnO to $SiO_2$ in $BCl_3/Ar/Cl_2$ plasma were investigated. It was found that ZnO etch rate shows a non-monotonic behavior with increasing both Ar fraction in $BCl_3$ plasma, RF power, and gas pressure. The maximum ZnO etch rate of 53 nm/min was obtained for $BCl_3$(16 sccm)/Ar(4 sccm)/$Cl_2$(3 sccm) gas mixture. The chemical state of etched surfaces was investigated with X-ray photoelectron spectroscopy (XPS). From these data, the suggestions on the ZnO etch mechanism were made.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.262-262
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• 2016

최근 고해상도 디스플레이가 주목받으면서 기존 비정질 실리콘(a-Si)을 대체할 수 있는 재료에 관한 연구가 활발히 진행되고 있다. a-Si의 경우 간단한 공정 과정, 적은 생산비용, 대면적화가 가능하다는 장점이 있지만 전자 이동도가 매우 낮은 단점이 있다. 반면, 산화물 반도체는 비정질 상태에서 전자 이동도가 높으며 큰 밴드갭을 가지고 있어 투명한 특성을 나타낼 뿐만 아니라, 저온공정이 가능하여 기판의 제한이 없는 장점을 가지고 있다. 대표적으로 가장 널리 연구되고 있는 산화물 반도체는 a-IGZO(amorphous indium-gallium-zinc oxide)이다. 그러나 InZnO(IZO) 기반의 산화물 반도체에서 carrier suppressor 역할을 하는 Ga(gallium)은 수요에 대한 공급이 원활하지 못하여 비싸다는 단점이 있다. 그러므로 경제적이면서 a-IGZO와 유사한 전기적 특성을 나타낼 수 있는 suppressor 물질이 필요하다. 따라서 본 연구에서는 IZO 기반의 산화물 반도체에서 Ga을 Hf(hafnium), Zr(zirconium), Si(silicon)으로 대체하여 용액증착(solution-deposition) 공정으로 각각의 채널층을 형성한 back-gate type의 박막 트랜지스터(thin-film transistor, TFT) 소자를 제작하였다. 용액증착 공정은 물질의 비율을 자유롭게 조절할 수 있고, 대기압의 조건에서도 공정이 가능하기 때문에 짧은 공정시간과 저비용의 장점이 있다. 제작된 소자는 p-type Si 위에 게이트 절연막으로 100 nm의 열산화막이 성장된 기판을 사용하였다. 표준 RCA 클리닝 후에 각 solution 물질을 spin coating 방식으로 증착하였다. 이후, photolithography, develop, wet etching의 과정을 거쳐 채널층 패턴을 형성하였다. 또한, 산화물 반도체의 전기적 특성을 향상시키기 위해서 후속 열처리 과정(post deposition annealing, PDA)은 필수적이다. CTA 방식은 높은 열처리 온도와 긴 열처리 시간의 단점이 있다. 따라서, 본 연구에서는 $100^{\circ}C$ 이하의 낮은 온도와 짧은 열처리 시간의 장점을 가지는 MWI (microwave irradiation)를 후속 열처리로 진행하였다. 그 결과, 각 물질로 구현된 소자들은 기존 a-IGZO와 비교하여 적은 양의 carrier suppressor로도 우수한 전기적 특성 및 안정성을 얻을 수 있었다. 따라서, Si, Hf, Zr 기반의 산화물 반도체는 기존의 Ga을 대체하여 저비용으로 디스플레이를 구현할 수 있는 IZO 기반 재료로 기대된다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.11a
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• pp.95-98
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• 2002

전력선 통신 blocking filter용 자심 재료를 개발하기 위해서 MnO 24 mol%, ZnO 25 mol% and $Fe_{2}O_{3}$ 51 mol% 의 기본조성에 $MoO_{3}$, $SiO_{2}$, CaO를 첨가하여 $1350^{\circ}C$에서 대기압 상수 A를 7.8롤 고정하고 소결하여 미세구조를 제어하였으며 기본 조성에 $MoO_{3}$ 400 ppm, $SiO_{2}$ 100 ppm and CaO 200 ppm을 첨가한 경우 평균 입경 $25{\mu}m$ 의 균일한 결정립으로 구성된 미세구조를 얻었고 기공의 감소에 의한 치밀화로 $4.98g/cm^{2}$의 고밀도화가 이루어 졌다. 또한 소결체의 균일한 미세구조와 고밀도화로 인해서 8221(${25^{\circ}C}$, 1 KHz) 의 가장 높은 투자율 특성을 나타냈다. 시편의 온도가 증가함에 따라 투자율이 증가되어 ${110^{\circ}C}$에서 13904의 거대 투자융이 측정되었고, 코일의 인가주파수가 1 KHz에서 1 MHz까지 증가됨에 따라 최고 ${102^{\circ}C}$까지 시편 온도가 상승하였다. 가장 높은 투자율 특성을 나타낸 ferrite 코어를 사용하여 단상 및 3상용 블로킹 필터의 감쇄율을 측정한 결과 현재 국내의 전력선 통신용 주파수 대역으로 규정되어 있는 10 KHz ~ 450 KHz 대역에서 각각 -46.46 dB와 -73.9 dB의 최고 값을 얻었다.

• 한국신재생에너지학회:학술대회논문집
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• 2005.06a
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• pp.113-116
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• 2005

In this paper, silicon thin-film solar cells(Si- TFSC) and a-Si/c-Si heterojunction solar cells(HJ-cell) are investigated. The Si-TFSC was prepared on glass substrate by depositing $1-3{\mu}m$ thin-film silicons by glow discharge method. The $a-Si:H/{\mu}c-Si:H$ tandem solar cells on textured ZnO:A1 TCO (transparent conducting oxide) showed improved Jsc in top and bottom cells than that on $SnO_2:F$ TCO. This enhancement of jsc resulted from improved light trapping effect by front textured ZnO:A1. The a-Si/c-Si HJ-cells with simple structure without high efficiency features are suffering from low Voc and Jsc. The improvement of front nip and back interface properties by adopting high quality silicon-films at low temperature should be done both for increasing device performances and production cost.

• Corrosion Science and Technology
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• v.10 no.1
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• pp.6-12
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• 2011

The selective surface oxidation of a transformation-induced-plasticity (TRIP) steel containing 1.6 wt.% Mn and 1.5 wt.% Si during annealing at $800^{\circ}C$ was investigated for its influence on the formation of an inhibition layer during hot-dip galvanizing. The selective oxidation of the alloying elements and the oxide morphology were significantly influenced by the annealing atmosphere. The pure $N_{2}$ atmosphere with a dew point $-40^{\circ}C$ promoted the selective oxidation of Mn as a crystalline $Mn_{2}SiO_{4}$ phase, whereas the $N_{2}$ + 10% $H_{2}$ atmosphere with the same dew point $-40^{\circ}C$ promoted the selective oxidation of Si as an amorphous Si-rich oxide phase. During hot-dip galvanizing, the $Mn_{2}SiO_{4}$ phase was reduced more readily by Al in the Zn bath than the Si-rich oxide phase. Consequently, the pure $N_{2}$ atmosphere resulted in a higher formation rate of $Fe_{2}Al_{5}$ particles at the Zn/steel interface and better galvanizability than the $N_{2}$ + 10% $H_{2}$ atmosphere.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1453-1454
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• 2011

We have investigated the effect of silicon contents (0~0.4 molar ratios) on the performance of solution processed silicon-indium-zinc oxide (SIZO) thin-film transistors (TFTs). Despites its solution processed channel layer, low annealed temperature below $200^{\circ}C$ in air has been used for SIZO-TFTs. The $V_{th}$ is shifted from -4.04 to 5.15 V as increasing Si ratio in the SIZO-TFTs. The positive shift of $V_{th}$ as increasing Si contents in SIZO system indicates that Si suppresses the carrier generation in the active channel layer since $V_{th}$ is defined as the voltage required accumulating sufficient charge carriers to form a conductive channel path.

• Journal of the Korean Ceramic Society
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• v.34 no.3
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• pp.289-295
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• 1997

Effect of ceramic processing was investigated on the microstructure and electronic properties of low loss Mn-Zn ferrite. Addition of CaO and SiO2 to calcined powder rather than to raw materials mixtured resulted in finer-grained microstructure. Higher oxygen pressure during sintering caused microstructural inhomogeneity and the increase in power loss and disaccommodation factor. Relatively low power loss was found for sintering up to 130$0^{\circ}C$ from powders calcined at high temperature and milled shortly. It was caused by slow densification rate and normal grain growth up to 130$0^{\circ}C$. Calcination at low temperature and prolonged milling enhanced den-sification, which gave a fine grained microstructure and low powder loss at sintering temperture below 120$0^{\circ}C$. Sintering temperature above 125$0^{\circ}C$, however, showed abnormal grain growth.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.2
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• pp.315-322
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• 2002

A thin film oxide semiconductor micro gas sensor array which shows only 60㎽ of power consumption at an operating temperature of 30$0^{\circ}C$ has been fabricated using microfabrication and rnicrornachining techniques. Excellent thermal insulation of the membrane is achieved by the use of a double la! or structure of 0.1${\mu}{\textrm}{m}$ thick Si$_3$N$_4$ and 1${\mu}{\textrm}{m}$ thick phosphosilicate glass(PSG) prepared by low pressure chemical vapor deposition(LPCVD) and atmospheric－pressure chemical-vapor deposition(APCVD), respectively. The sensor way consists of such thin film oxide semiconductor sensing materials as 1wt.％ Pd-doped SnO$_2$, 6wt.% AI$_2$O$_3$-doped ZnO, WO$_3$ and ZnO. The thin film oxide semiconductor micro gas sensor array exhibited resistance changes usable for subsequent data processing upon exposure to various gases and the sensitivity strongly depended on the sensing layer materials. Heater Part of the sensor structure has been modified in order to improve the process yield of the sensor, and as a result of modified heater structure improved process yield has been achieved.